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| author | Anish Dabhane <anishdabhane71@gmail.com> | 2025-05-18 19:31:03 +0530 |
|---|---|---|
| committer | Jonathan Corbet <corbet@lwn.net> | 2025-05-19 05:33:48 -0600 |
| commit | 2dbe93d1e4d730e6e730310035906aa85fa5eee6 (patch) | |
| tree | 082d2a746cdecb21b00908228f7f50b0af4b3928 | |
| parent | 95112d977fbc46121f4a230543d56981dcb5df9f (diff) | |
Fix spelling error for 'parallel'
Signed-off-by: Anish Dabhane <anishdabhane71@gmail.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Message-ID: <20250518140107.21310-1-anishdabhane71@gmail.com>
| -rw-r--r-- | Documentation/gpu/rfc/i915_scheduler.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/gpu/rfc/i915_scheduler.rst b/Documentation/gpu/rfc/i915_scheduler.rst index c237ebc024cd..2974525f0ac5 100644 --- a/Documentation/gpu/rfc/i915_scheduler.rst +++ b/Documentation/gpu/rfc/i915_scheduler.rst @@ -26,7 +26,7 @@ i915 with the DRM scheduler is: which configures a slot with N contexts * After I915_CONTEXT_ENGINES_EXT_PARALLEL a user can submit N batches to a slot in a single execbuf IOCTL and the batches run on the GPU in - paralllel + parallel * Initially only for GuC submission but execlists can be supported if needed * Convert the i915 to use the DRM scheduler |