diff options
| author | Jani Nikula <jani.nikula@intel.com> | 2025-06-25 13:32:20 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2025-06-26 11:55:53 +0300 |
| commit | 3a34fd6de47908a9d4e830ec6063397b4bfc1bac (patch) | |
| tree | 89837b79c400177e41a340d30204420c7cd0862c | |
| parent | 70349f275f2aecd1a9ff9440182b24defe8a5e77 (diff) | |
drm/i915/wm: add more accessors to dbuf state
Add intel_dbuf_num_enabled_slices() and intel_dbuf_num_active_pipes()
helpers to avoid looking at struct intel_dbuf_state internals outside of
skl_watermark.c.
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://lore.kernel.org/r/7d555e7b4e93632b732b8b5a3cd4076baf781bee.1750847509.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_pmdemand.c | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/display/skl_watermark.c | 10 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/display/skl_watermark.h | 3 |
3 files changed, 16 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_pmdemand.c b/drivers/gpu/drm/i915/display/intel_pmdemand.c index 0f1501c456df..eeb88f9fc92d 100644 --- a/drivers/gpu/drm/i915/display/intel_pmdemand.c +++ b/drivers/gpu/drm/i915/display/intel_pmdemand.c @@ -358,12 +358,12 @@ int intel_pmdemand_atomic_check(struct intel_atomic_state *state) if (DISPLAY_VER(display) < 30) { new_pmdemand_state->params.active_dbufs = - min_t(u8, hweight8(new_dbuf_state->enabled_slices), 3); + min_t(u8, intel_dbuf_num_enabled_slices(new_dbuf_state), 3); new_pmdemand_state->params.active_pipes = - min_t(u8, hweight8(new_dbuf_state->active_pipes), 3); + min_t(u8, intel_dbuf_num_active_pipes(new_dbuf_state), 3); } else { new_pmdemand_state->params.active_pipes = - min_t(u8, hweight8(new_dbuf_state->active_pipes), INTEL_NUM_PIPES(display)); + min_t(u8, intel_dbuf_num_active_pipes(new_dbuf_state), INTEL_NUM_PIPES(display)); } new_cdclk_state = intel_atomic_get_cdclk_state(state); diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index 9ae9f02b11ca..3574df9b1df7 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -3704,6 +3704,16 @@ void intel_dbuf_post_plane_update(struct intel_atomic_state *state) gen9_dbuf_slices_update(display, new_slices); } +int intel_dbuf_num_enabled_slices(const struct intel_dbuf_state *dbuf_state) +{ + return hweight8(dbuf_state->enabled_slices); +} + +int intel_dbuf_num_active_pipes(const struct intel_dbuf_state *dbuf_state) +{ + return hweight8(dbuf_state->active_pipes); +} + bool intel_dbuf_pmdemand_needs_update(struct intel_atomic_state *state) { struct intel_display *display = to_intel_display(state); diff --git a/drivers/gpu/drm/i915/display/skl_watermark.h b/drivers/gpu/drm/i915/display/skl_watermark.h index 3b9a0b254cff..a1993ded034a 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.h +++ b/drivers/gpu/drm/i915/display/skl_watermark.h @@ -78,6 +78,9 @@ struct intel_dbuf_state { struct intel_dbuf_state * intel_atomic_get_dbuf_state(struct intel_atomic_state *state); +int intel_dbuf_num_enabled_slices(const struct intel_dbuf_state *dbuf_state); +int intel_dbuf_num_active_pipes(const struct intel_dbuf_state *dbuf_state); + int intel_dbuf_init(struct intel_display *display); int intel_dbuf_state_set_mdclk_cdclk_ratio(struct intel_atomic_state *state, int ratio); |