diff options
| author | Aryabhatta Dey <aryabhattadey35@gmail.com> | 2024-08-17 08:56:29 +0530 |
|---|---|---|
| committer | Rob Herring (Arm) <robh@kernel.org> | 2024-08-19 17:04:55 -0500 |
| commit | 4b989e6e1a4fd726271fac589782ac1f4cb6bf55 (patch) | |
| tree | 26410447804fb8e4c026f57e0fccf5aeb39bfc17 | |
| parent | 25b7d2cbba723bcff3aef40f7c2c78838a90d22e (diff) | |
dt-bindings: arc: convert archs-pct.txt to yaml
Convert dt-binding archs-pct from txt to yaml format.
Signed-off-by: Aryabhatta Dey <aryabhattadey35@gmail.com>
Link: https://lore.kernel.org/r/emosjjbdwimwevrf2ew2dpn5sdx254el5fanhhquouu4bz6nbe@zqyp5ra7bmhh
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
| -rw-r--r-- | Documentation/devicetree/bindings/arc/archs-pct.txt | 17 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/arc/snps,archs-pct.yaml | 33 |
2 files changed, 33 insertions, 17 deletions
diff --git a/Documentation/devicetree/bindings/arc/archs-pct.txt b/Documentation/devicetree/bindings/arc/archs-pct.txt deleted file mode 100644 index e4b9dcee6d41..000000000000 --- a/Documentation/devicetree/bindings/arc/archs-pct.txt +++ /dev/null @@ -1,17 +0,0 @@ -* ARC HS Performance Counters - -The ARC HS can be configured with a pipeline performance monitor for counting -CPU and cache events like cache misses and hits. Like conventional PCT there -are 100+ hardware conditions dynamically mapped to up to 32 counters. -It also supports overflow interrupts. - -Required properties: - -- compatible : should contain - "snps,archs-pct" - -Example: - -pmu { - compatible = "snps,archs-pct"; -}; diff --git a/Documentation/devicetree/bindings/arc/snps,archs-pct.yaml b/Documentation/devicetree/bindings/arc/snps,archs-pct.yaml new file mode 100644 index 000000000000..532f7584f59f --- /dev/null +++ b/Documentation/devicetree/bindings/arc/snps,archs-pct.yaml @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arc/snps,archs-pct.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARC HS Performance Counters + +maintainers: + - Aryabhatta Dey <aryabhattadey35@gmail.com> + +description: + The ARC HS can be configured with a pipeline performance monitor for counting + CPU and cache events like cache misses and hits. Like conventional PCT there + are 100+ hardware conditions dynamically mapped to up to 32 counters. + It also supports overflow interrupts. + +properties: + compatible: + const: snps,archs-pct + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - clocks + +additionalProperties: false |