diff options
| author | David Regan <dregan@broadcom.com> | 2025-05-22 10:25:17 -0700 |
|---|---|---|
| committer | Miquel Raynal <miquel.raynal@bootlin.com> | 2025-05-23 16:48:41 +0200 |
| commit | 528b541b71cf03e263272b051b70696f92258e9d (patch) | |
| tree | 0ea7712cae20a01ff4a0ce9d88e4e0ef235ff0d7 | |
| parent | 4a5a99bc79cdc4be63933653682b0261a67a0c9f (diff) | |
mtd: nand: brcmnand: fix NAND timeout when accessing eMMC
When booting a board to NAND and accessing NAND while eMMC
transactions are occurring the NAND will sometimes timeout. This
is due to both NAND and eMMC controller sharing the same data bus
on BCMBCA chips. Fix is to extend NAND timeout to allow eMMC
transactions time to complete.
Signed-off-by: David Regan <dregan@broadcom.com>
Reviewed-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| -rw-r--r-- | drivers/mtd/nand/raw/brcmnand/brcmnand.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 299dd2bca5b4..b43281b8204f 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -101,7 +101,7 @@ struct brcm_nand_dma_desc { #define BRCMNAND_MIN_DEVSIZE (4ULL * 1024 * 1024) #define NAND_CTRL_RDY (INTFC_CTLR_READY | INTFC_FLASH_READY) -#define NAND_POLL_STATUS_TIMEOUT_MS 100 +#define NAND_POLL_STATUS_TIMEOUT_MS 500 #define EDU_CMD_WRITE 0x00 #define EDU_CMD_READ 0x01 |