Merge Fix V4l2 and DSI

4 files changed, 131 insertions, 31 deletions

diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index fea64b9d5dbb..db994d03f3d3 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -341,25 +341,11 @@ int dsi_set_backlight(struct omap_dss_device *dssdev, int level)
 	twl_i2c_write_u8(TWL_MODULE_PWM, 0x7F, 0x04);
 	twl_i2c_write_u8(TWL6030_MODULE_ID1, 0x30, 0x92);
 	if (dssdev->channel == OMAP_DSS_CHANNEL_LCD) {
-		mdelay(500);
-		gpio_set_value(102, 1);
-		mdelay(500);
-		gpio_set_value(102, 0);
-		mdelay(500);
-		gpio_set_value(102, 1);
-
 		mdelay(120);
 		gpio_set_value(27, 0);
 		mdelay(120);
 		gpio_set_value(27, 1);
 	}else{
-                mdelay(500);
-                gpio_set_value(104, 1);
-                mdelay(500);
-                gpio_set_value(104, 0);
-                mdelay(500);
-                gpio_set_value(104, 1);
-
                 mdelay(120);
                 gpio_set_value(59, 0);
                 mdelay(120);
diff --git a/drivers/media/video/omap/omap_vout.c b/drivers/media/video/omap/omap_vout.c
index bf02e84b564b..cfc1096af2a2 100644
--- a/drivers/media/video/omap/omap_vout.c
+++ b/drivers/media/video/omap/omap_vout.c
@@ -1166,10 +1166,10 @@ venc:
 	vout->next_frm->state = VIDEOBUF_ACTIVE;
 	addr = (unsigned long)
 		vout->queued_buf_addr[vout->next_frm->i] +
-		vout->cropped_offset;
+		vout->cropped_offset[vout->next_frm->i];
 	uv_addr = (unsigned long)vout->queued_buf_uv_addr[
 		vout->next_frm->i]
-		+ vout->cropped_uv_offset;
+		+ vout->cropped_uv_offset[vout->next_frm->i];
 
 	/* First save the configuration in ovelray structure */
 	ret = omapvid_init(vout, addr, uv_addr);
diff --git a/drivers/video/omap2/displays/panel-taal.c b/drivers/video/omap2/displays/panel-taal.c
index e6fbf3ea5102..439191bae4bd 100644
--- a/drivers/video/omap2/displays/panel-taal.c
+++ b/drivers/video/omap2/displays/panel-taal.c
@@ -70,6 +70,7 @@ static irqreturn_t taal_te_isr2(int irq, void *data);
 static void taal_te_timeout_work_callback(struct work_struct *work);
 static int _taal_enable_te(struct omap_dss_device *dssdev, bool enable);
 static void te_work_callback(struct work_struct *work);
+static void te2_work_callback(struct work_struct *work);
 static int taal_update(struct omap_dss_device *dssdev,
 				u16 x, u16 y, u16 w, u16 h);
 
@@ -241,6 +242,7 @@ struct taal_data {
 		u16 h;
 	} update_region;
 	struct delayed_work te_timeout_work;
+	struct workqueue_struct *te_wq;
 	struct work_struct te_framedone_work;
 
 	bool use_dsi_bl;
@@ -833,9 +835,19 @@ static int taal_probe(struct omap_dss_device *dssdev)
 		}
 
 		INIT_DELAYED_WORK_DEFERRABLE(&td->te_timeout_work,
-					taal_te_timeout_work_callback);
-		if (td->force_update)
-			INIT_WORK(&td->te_framedone_work, te_work_callback);
+				taal_te_timeout_work_callback);
+
+		if (td->force_update) {
+			if (dssdev->channel == OMAP_DSS_CHANNEL_LCD) {
+				td->te_wq = create_workqueue("taal wq");
+				INIT_WORK(&td->te_framedone_work,
+					te_work_callback);
+			} else {
+				td->te_wq = create_workqueue("taal2 wq");
+				INIT_WORK(&td->te_framedone_work,
+					te2_work_callback);
+			}
+		}
 
 		dev_dbg(&dssdev->dev, "Using GPIO TE\n");
 		iounmap(phymux_base);
@@ -1134,6 +1146,8 @@ static int taal_resume(struct omap_dss_device *dssdev)
 
 	dsi_bus_lock(ix);
 
+	td->te_enabled = 1;
+
 	r = taal_power_on(dssdev);
 
 	dsi_bus_unlock(ix);
@@ -1177,6 +1191,16 @@ static void te_work_callback(struct work_struct *work)
 	taal_update(dssdev, 0, 0, x_res, y_res);
 }
 
+static void te2_work_callback(struct work_struct *work)
+{
+	struct taal_data *td = container_of(work, struct taal_data,
+					te_framedone_work);
+	struct omap_dss_device *dssdev = td->dssdev;
+	u16 x_res = dssdev->panel.timings.x_res;
+	u16 y_res = dssdev->panel.timings.y_res;
+
+	taal_update(dssdev, 0, 0, x_res, y_res);
+}
 static irqreturn_t taal_te_isr(int irq, void *data)
 {
 	struct omap_dss_device *dssdev = data;
@@ -1185,7 +1209,7 @@ static irqreturn_t taal_te_isr(int irq, void *data)
 	int r;
 
 	if (td->force_update) {
-		schedule_work(&td->te_framedone_work);
+		queue_work(td->te_wq, &td->te_framedone_work);
 		return IRQ_HANDLED;
 	}
 
@@ -1219,7 +1243,7 @@ static irqreturn_t taal_te_isr2(int irq, void *data)
         int r;
         
 	if (td->force_update) {
-                schedule_work(&td->te_framedone_work);
+		queue_work(td->te_wq, &td->te_framedone_work);
                 return IRQ_HANDLED;
         }
 
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c
index a88db440099d..c2c5a79eb1cd 100644
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/omap2/dss/dsi.c
@@ -530,8 +530,97 @@ irqreturn_t dsi_irq_handler(int irq, void *arg)
 	enum omap_dsi_index ix = DSI1;
 	struct dsi_struct *p_dsi;
 
-	if (cpu_is_omap44xx() && irq == OMAP44XX_IRQ_DSS_DSI2)
-		ix = DSI2;
+	p_dsi = (ix == DSI1) ? &dsi1 : &dsi2;
+
+	irqstatus = dsi_read_reg(ix, DSI_IRQSTATUS);
+
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+	spin_lock(&p_dsi->irq_stats_lock);
+	p_dsi->irq_stats.irq_count++;
+	dss_collect_irq_stats(irqstatus, p_dsi->irq_stats.dsi_irqs);
+#endif
+
+	if (irqstatus & DSI_IRQ_ERROR_MASK) {
+		DSSERR("DSI error, irqstatus %x\n", irqstatus);
+		print_irq_status(irqstatus);
+		spin_lock(&p_dsi->errors_lock);
+		p_dsi->errors |= irqstatus & DSI_IRQ_ERROR_MASK;
+		spin_unlock(&p_dsi->errors_lock);
+	} else if (debug_irq) {
+		print_irq_status(irqstatus);
+	}
+
+#ifdef DSI_CATCH_MISSING_TE
+	if (irqstatus & DSI_IRQ_TE_TRIGGER)
+		del_timer(&p_dsi->te_timer);
+#endif
+
+	for (i = 0; i < 4; ++i) {
+		if ((irqstatus & (1<<i)) == 0)
+			continue;
+
+		vcstatus = dsi_read_reg(ix, DSI_VC_IRQSTATUS(i));
+
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+		dss_collect_irq_stats(vcstatus, p_dsi->irq_stats.vc_irqs[i]);
+#endif
+
+		if (vcstatus & DSI_VC_IRQ_BTA){
+			complete(&p_dsi->bta_completion);
+
+			if (p_dsi->bta_callback)
+				p_dsi->bta_callback(ix);
+		}
+
+		if (vcstatus & DSI_VC_IRQ_ERROR_MASK) {
+			DSSERR("DSI VC(%d) error, vc irqstatus %x\n",
+				       i, vcstatus);
+			print_irq_status_vc(i, vcstatus);
+		} else if (debug_irq) {
+			print_irq_status_vc(i, vcstatus);
+		}
+
+		dsi_write_reg(ix, DSI_VC_IRQSTATUS(i), vcstatus);
+		/* flush posted write */
+		dsi_read_reg(ix, DSI_VC_IRQSTATUS(i));
+	}
+
+	if (irqstatus & DSI_IRQ_COMPLEXIO_ERR) {
+		ciostatus = dsi_read_reg(ix, DSI_COMPLEXIO_IRQ_STATUS);
+
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+		dss_collect_irq_stats(ciostatus, p_dsi->irq_stats.cio_irqs);
+#endif
+
+		dsi_write_reg(ix, DSI_COMPLEXIO_IRQ_STATUS, ciostatus);
+		/* flush posted write */
+		dsi_read_reg(ix, DSI_COMPLEXIO_IRQ_STATUS);
+
+		if (ciostatus & DSI_CIO_IRQ_ERROR_MASK) {
+			DSSERR("DSI CIO error, cio irqstatus %x\n", ciostatus);
+			print_irq_status_cio(ciostatus);
+		} else if (debug_irq) {
+			print_irq_status_cio(ciostatus);
+		}
+	}
+
+	dsi_write_reg(ix, DSI_IRQSTATUS, irqstatus & ~DSI_IRQ_CHANNEL_MASK);
+	/* flush posted write */
+	dsi_read_reg(ix, DSI_IRQSTATUS);
+
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+	spin_unlock(&p_dsi->irq_stats_lock);
+#endif
+	return IRQ_HANDLED;
+}
+
+irqreturn_t dsi2_irq_handler(int irq, void *arg)
+
+{
+	u32 irqstatus, vcstatus, ciostatus;
+	int i;
+	enum omap_dsi_index ix = DSI2;
+	struct dsi_struct *p_dsi;
 
 	p_dsi = (ix == DSI1) ? &dsi1 : &dsi2;
 
@@ -2724,7 +2813,7 @@ static void dsi_proto_timings(struct omap_dss_device *dssdev)
 	r = dsi_read_reg(ix, DSI_CLK_TIMING);
 	r = FLD_MOD(r, ddr_clk_pre, 15, 8);
 	r = FLD_MOD(r, ddr_clk_post, 7, 0);
-	dsi_write_reg(ix, DSI_CLK_TIMING, cpu_is_omap44xx() ? 0x0000120D : r);
+	dsi_write_reg(ix, DSI_CLK_TIMING, r);
 
 	DSSDBG("ddr_clk_pre %u, ddr_clk_post %u\n",
 			ddr_clk_pre,
@@ -2983,7 +3072,7 @@ static void dsi_update_screen_dispc(struct omap_dss_device *dssdev,
 	if (p_dsi->te_enabled) {
 		/* disable LP_RX_TO, so that we can receive TE.  Time to wait
 		 * for TE is longer than the timer allows */
-		REG_FLD_MOD(ix, DSI_TIMING2, 0, 15, 15); /* LP_RX_TO */
+		REG_FLD_MOD(ix, DSI_TIMING2, cpu_is_omap44xx() ? 0 : 1, 15, 15); /* LP_RX_TO */
 
 		if (cpu_is_omap44xx())
 			dsi_vc_send_bta(ix, 0);
@@ -3037,7 +3126,7 @@ static void dsi_handle_framedone(enum omap_dsi_index ix, int error)
 
 	if (p_dsi->te_enabled) {
 		/* enable LP_RX_TO again after the TE */
-		REG_FLD_MOD(ix, DSI_TIMING2, 1, 15, 15); /* LP_RX_TO */
+		REG_FLD_MOD(ix, DSI_TIMING2, cpu_is_omap44xx() ? 0 : 1, 15, 15); /* LP_RX_TO */
 	}
 
 	/* RX_FIFO_NOT_EMPTY */
@@ -3109,7 +3198,7 @@ static void dsi_framedone_irq_callback(void *data, u32 mask)
 
 	if (p_dsi->te_enabled) {
 		/* enable LP_RX_TO again after the TE */
-		REG_FLD_MOD(DSI1, DSI_TIMING2, 1, 15, 15); /* LP_RX_TO */
+		REG_FLD_MOD(DSI1, DSI_TIMING2, cpu_is_omap44xx() ? 0 : 1, 15, 15); /* LP_RX_TO */
 	}
 
 	/* Send BTA after the frame. We need this for the TE to work, as TE
@@ -3159,7 +3248,7 @@ static void dsi2_framedone_irq_callback(void *data, u32 mask)
 
         if (p_dsi->te_enabled) {
                 /* enable LP_RX_TO again after the TE */
-                REG_FLD_MOD(DSI2, DSI_TIMING2, 1, 15, 15); /* LP_RX_TO */
+                REG_FLD_MOD(DSI2, DSI_TIMING2, cpu_is_omap44xx() ? 0 : 1, 15, 15); /* LP_RX_TO */
         }
 
         /* Send BTA after the frame. We need this for the TE to work, as TE
@@ -3442,11 +3531,12 @@ static int dsi_display_init_dsi(struct omap_dss_device *dssdev)
 	dsi_if_enable(ix, 1);
 	dsi_force_tx_stop_mode_io(ix);
 
+#ifndef OMAP4430_REV_ES2_0
 	/* OMAP4 trim registers */
 	dsi_write_reg(ix, DSI_DSIPHY_CFG12, 0x58);
 	dsi_write_reg(ix, DSI_DSIPHY_CFG14, 0xAA05C800);
 	dsi_write_reg(ix, DSI_DSIPHY_CFG8, 0xC2E);
-
+#endif
 	return 0;
 err3:
 	dsi_complexio_uninit(ix);
@@ -3727,8 +3817,8 @@ int dsi2_init(struct platform_device *pdev)
 	INIT_DELAYED_WORK_DEFERRABLE(&dsi2.framedone_timeout_work,
 			dsi2_framedone_timeout_work_callback);
 
-       r = request_irq(OMAP44XX_IRQ_DSS_DSI2, dsi_irq_handler,
-                  0, "OMAP DSI2", (void *)0);
+        r = request_irq(OMAP44XX_IRQ_DSS_DSI2, dsi2_irq_handler,
+			0, "OMAP DSI2", (void *)0);
         if (r)
            goto err2;