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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2010-03-06 12:39:23 +0530
committerSantosh Shilimkar <santosh.shilimkar@ti.com>2010-03-06 12:39:23 +0530
commit79705bed9ab2e4827eeb4b20c9743b4fda326a5b (patch)
tree1ee2b30089a43d8e189777a12c5cd29dc32cdfb6
parentffd852c1e0cd3f4b95060def01cf7f3384e613d7 (diff)
ARM: Add omap-specific barrier implementation
This patch defines ARCH_HAS_BARRIERS for the OMAP4 platform if CACHE_L2X0 is enabled and adds the mach/barriers.h file. The mb() and wmb() barriers perform an L2 cache sync in addition to the DSB. The patch is based on top of Catalin's below series - [PATCH v3 0/4] ARM mandatory barriers - http://permalink.gmane.org/gmane.linux.ports.arm.kernel/75425 CC: Catalin Marinas <catalin.marinas@arm.com> CC: Tony Lindgren <tony@atomide.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
-rw-r--r--arch/arm/mach-omap2/include/mach/barriers.h32
-rw-r--r--arch/arm/plat-omap/Kconfig1
2 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/include/mach/barriers.h b/arch/arm/mach-omap2/include/mach/barriers.h
new file mode 100644
index 000000000000..e29aebfa2a7b
--- /dev/null
+++ b/arch/arm/mach-omap2/include/mach/barriers.h
@@ -0,0 +1,32 @@
+/*
+ * omap barriers.h
+ *
+ * Copyright (C) 2010 Texas Instruments Ltd.
+ * Copyright (C) 2010 ARM Ltd.
+ * Written by Santosh Shilimkar <santosh.shilimkar@ti.com>
+ * based on realview version of Catalin Marinas <catalin.marinas@arm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef __MACH_BARRIERS_H
+#define __MACH_BARRIERS_H
+
+#include <asm/outercache.h>
+
+#define rmb() dmb()
+#define wmb() do { dsb(); outer_sync(); } while (0)
+#define mb() wmb()
+
+#endif /* __MACH_BARRIERS_H */
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index ac4c3a221dbd..02758b54ba65 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -28,6 +28,7 @@ config ARCH_OMAP4
select CPU_V7
select ARM_GIC
select COMMON_CLKDEV
+ select ARCH_HAS_BARRIERS if CACHE_L2X0
endchoice