diff options
| author | Thippeswamy Havalige <thippesw@amd.com> | 2024-06-24 16:40:22 +0530 |
|---|---|---|
| committer | Krzysztof Wilczyński <kwilczynski@kernel.org> | 2024-07-04 14:46:09 +0000 |
| commit | a3ec59e982e08366fa755730bbe803f7ed042391 (patch) | |
| tree | 23f43fd05a730bdd5eb285fb23afea1c3bb97f80 | |
| parent | 743025b0e072dafa6e176409eaac6e0ee203b6b3 (diff) | |
dt-bindings: PCI: xilinx-cpm: Fix overlapping of bridge register and 32-bit BAR addresses
The current configuration had non-prefetchable memory overlapping with
bridge registers by 64KB from base address.
This patch fixes the 'ranges' property in the device tree by adjusting
the non-prefetchable memory addresses beyond the 64KB mark to prevent
conflicts.
[kwilczynski: commit log]
Link: https://lore.kernel.org/linux-pci/20240624111022.133780-1-thippesw@amd.com
Signed-off-by: Thippeswamy Havalige <thippesw@amd.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
| -rw-r--r-- | Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml index 4770ce02fcc3..989fb0fa2577 100644 --- a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml +++ b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml @@ -92,7 +92,7 @@ examples: <0 0 0 3 &pcie_intc_0 2>, <0 0 0 4 &pcie_intc_0 3>; bus-range = <0x00 0xff>; - ranges = <0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000>, + ranges = <0x02000000 0x0 0xe0010000 0x0 0xe0010000 0x0 0x10000000>, <0x43000000 0x80 0x00000000 0x80 0x00000000 0x0 0x80000000>; msi-map = <0x0 &its_gic 0x0 0x10000>; reg = <0x0 0xfca10000 0x0 0x1000>, |