diff options
| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2024-08-18 19:28:43 +0200 |
|---|---|---|
| committer | Krzysztof Wilczyński <kwilczynski@kernel.org> | 2024-09-04 14:32:34 +0000 |
| commit | a5c1bf7e9a4638fbb27461e9801f07204b50dcb6 (patch) | |
| tree | 070abd3e6d11e356630d4b0256c96b6bb227c83f | |
| parent | c62a0b8fe8bfbaa78efe5de7b30a9d0d225be1ab (diff) | |
dt-bindings: PCI: socionext,uniphier-pcie-ep: Add top-level constraints
Properties with variable number of items per each device are expected to
have widest constraints in top-level "properties:" block and further
customized (narrowed) in "if:then:".
Add missing top-level constraints for clock-names and reset-names.
Link: https://lore.kernel.org/linux-pci/20240818172843.121787-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
| -rw-r--r-- | Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml index f0d8e486a07d..93f3d0f4bb94 100644 --- a/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml @@ -38,13 +38,17 @@ properties: minItems: 1 maxItems: 2 - clock-names: true + clock-names: + minItems: 1 + maxItems: 2 resets: minItems: 1 maxItems: 2 - reset-names: true + reset-names: + minItems: 1 + maxItems: 2 num-ib-windows: const: 16 |