diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2025-03-10 20:35:28 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2025-03-25 22:48:13 +0200 |
| commit | e8828d7fdbb9241d44f9c403f5088e05b3da102c (patch) | |
| tree | cbb2ac8bee7065e6249ee5f9770e397d6194888c | |
| parent | 7ab420b966346067132b05be8196e67adc72e568 (diff) | |
drm/i915: Move intel_disable_shared_dpll() into ilk_pch_post_disable()
On ILK-IVB only PCH outputs use shared dplls. Move the relevant
intel_disable_shared_dpll() into ilk_pch_post_disable() to make
that clear (and if we extend the dpll mgr to cover all plls we need
different enable/disable points anyway for the PCH vs. CPU eDP cases).
The intel_enable_shared_dpll() counterpart was already in
ilk_pch_enable() anyway, so this is the more symmetric place for the
disable as well.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250310183528.3203-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_display.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_pch_display.c | 4 |
2 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 526074ed5026..ee7812126129 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1773,8 +1773,6 @@ static void ilk_crtc_disable(struct intel_atomic_state *state, intel_set_cpu_fifo_underrun_reporting(display, pipe, true); intel_set_pch_fifo_underrun_reporting(display, pipe, true); - - intel_disable_shared_dpll(old_crtc_state); } static void hsw_crtc_disable(struct intel_atomic_state *state, diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c b/drivers/gpu/drm/i915/display/intel_pch_display.c index 27fb386c84c3..b909ed18a5b2 100644 --- a/drivers/gpu/drm/i915/display/intel_pch_display.c +++ b/drivers/gpu/drm/i915/display/intel_pch_display.c @@ -460,6 +460,8 @@ void ilk_pch_post_disable(struct intel_atomic_state *state, { struct intel_display *display = to_intel_display(crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + const struct intel_crtc_state *old_crtc_state = + intel_atomic_get_old_crtc_state(state, crtc); enum pipe pipe = crtc->pipe; ilk_disable_pch_transcoder(crtc); @@ -476,6 +478,8 @@ void ilk_pch_post_disable(struct intel_atomic_state *state, } ilk_fdi_pll_disable(crtc); + + intel_disable_shared_dpll(old_crtc_state); } static void ilk_pch_clock_get(struct intel_crtc_state *crtc_state) |