diff options
author | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2024-04-02 08:17:13 -0400 |
---|---|---|
committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2024-04-02 08:17:13 -0400 |
commit | 5add703f6acad1c63f8a532b6de56e50d548e904 (patch) | |
tree | be39a82716119cd8b7cf7e2734baf8cd9a80ceb7 /arch/arm/mach-omap2/omap-secure.c | |
parent | 71cdfa8cad300caa7afcbba09776bbc8dcfa9e39 (diff) | |
parent | 39cd87c4eb2b893354f3b850f916353f2658ae6f (diff) |
Merge drm/drm-next into drm-intel-next
Catching up on 6.9-rc2
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap-secure.c')
-rw-r--r-- | arch/arm/mach-omap2/omap-secure.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/omap-secure.c b/arch/arm/mach-omap2/omap-secure.c index 29c7350b06ab..c2e1aecd07cc 100644 --- a/arch/arm/mach-omap2/omap-secure.c +++ b/arch/arm/mach-omap2/omap-secure.c @@ -47,7 +47,7 @@ static void __init omap_optee_init_check(void) } /** - * omap_sec_dispatcher: Routine to dispatch low power secure + * omap_secure_dispatcher - Routine to dispatch low power secure * service routines * @idx: The HAL API index * @flag: The flag indicating criticality of operation @@ -183,7 +183,7 @@ static u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs, /** * rx51_secure_update_aux_cr: Routine to modify the contents of Auxiliary Control Register * @set_bits: bits to set in ACR - * @clr_bits: bits to clear in ACR + * @clear_bits: bits to clear in ACR * * Return the non-zero error value on failure. */ |