diff options
author | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 17:55:21 -0700 |
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committer | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 17:55:21 -0700 |
commit | bbb20089a3275a19e475dbc21320c3742e3ca423 (patch) | |
tree | 216fdc1cbef450ca688135c5b8969169482d9a48 /arch/blackfin/mach-common/arch_checks.c | |
parent | 3e48e656903e9fd8bc805c6a2c4264d7808d315b (diff) | |
parent | 657a77fa7284d8ae28dfa48f1dc5d919bf5b2843 (diff) |
Merge branch 'dmaengine' into async-tx-next
Conflicts:
crypto/async_tx/async_xor.c
drivers/dma/ioat/dma_v2.h
drivers/dma/ioat/pci.c
drivers/md/raid5.c
Diffstat (limited to 'arch/blackfin/mach-common/arch_checks.c')
-rw-r--r-- | arch/blackfin/mach-common/arch_checks.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/blackfin/mach-common/arch_checks.c b/arch/blackfin/mach-common/arch_checks.c index 80d39b2f9db2..5998d8632a73 100644 --- a/arch/blackfin/mach-common/arch_checks.c +++ b/arch/blackfin/mach-common/arch_checks.c @@ -71,3 +71,10 @@ #if ANOMALY_05000448 # error You are using a part with anomaly 05000448, this issue causes random memory read/write failures - that means random crashes. #endif + +/* if 220 exists, can not set External Memory WB and L2 not_cached, either External Memory not_cached and L2 WB */ +#if ANOMALY_05000220 && \ + ((defined(CONFIG_BFIN_EXTMEM_WRITEBACK) && !defined(CONFIG_BFIN_L2_DCACHEABLE)) || \ + (!defined(CONFIG_BFIN_EXTMEM_DCACHEABLE) && defined(CONFIG_BFIN_L2_WRITEBACK))) +# error You are exposing Anomaly 220 in this config, either config L2 as Write Through, or make External Memory WB. +#endif |