summaryrefslogtreecommitdiff
path: root/arch/powerpc/include/asm/io.h
diff options
context:
space:
mode:
authorMichael Ellerman <mpe@ellerman.id.au>2018-05-14 22:50:31 +1000
committerMichael Ellerman <mpe@ellerman.id.au>2018-05-18 21:59:56 +1000
commit8056fe28d04607106e7d418bd9ee2e63562def50 (patch)
tree04aa8f233d676a8925d27356c942b3d92adbfb4d /arch/powerpc/include/asm/io.h
parentd2032678e57fc508d7878307badde8f89b632ba3 (diff)
powerpc/io: Add __raw_writeq_be() __raw_rm_writeq_be()
Add byte-swapping versions of __raw_writeq() and __raw_rm_writeq(). This allows us to avoid sparse warnings caused by passing __be64 to __raw_writeq(), which takes unsigned long: arch/powerpc/platforms/powernv/pci-ioda.c:1981:38: warning: incorrect type in argument 1 (different base types) expected unsigned long [unsigned] v got restricted __be64 [usertype] <noident> It's also generally preferable to use a byte-swapping accessor rather than doing it by hand in the code, which is more bug prone. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Reviewed-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Diffstat (limited to 'arch/powerpc/include/asm/io.h')
-rw-r--r--arch/powerpc/include/asm/io.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index af074923d598..e0331e754568 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -367,6 +367,11 @@ static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
*(volatile unsigned long __force *)PCI_FIX_ADDR(addr) = v;
}
+static inline void __raw_writeq_be(unsigned long v, volatile void __iomem *addr)
+{
+ __raw_writeq((__force unsigned long)cpu_to_be64(v), addr);
+}
+
/*
* Real mode versions of the above. Those instructions are only supposed
* to be used in hypervisor real mode as per the architecture spec.
@@ -395,6 +400,11 @@ static inline void __raw_rm_writeq(u64 val, volatile void __iomem *paddr)
: : "r" (val), "r" (paddr) : "memory");
}
+static inline void __raw_rm_writeq_be(u64 val, volatile void __iomem *paddr)
+{
+ __raw_rm_writeq((__force u64)cpu_to_be64(val), paddr);
+}
+
static inline u8 __raw_rm_readb(volatile void __iomem *paddr)
{
u8 ret;