diff options
author | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2024-04-02 08:17:13 -0400 |
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committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2024-04-02 08:17:13 -0400 |
commit | 5add703f6acad1c63f8a532b6de56e50d548e904 (patch) | |
tree | be39a82716119cd8b7cf7e2734baf8cd9a80ceb7 /arch/riscv/kvm/vcpu_insn.c | |
parent | 71cdfa8cad300caa7afcbba09776bbc8dcfa9e39 (diff) | |
parent | 39cd87c4eb2b893354f3b850f916353f2658ae6f (diff) |
Merge drm/drm-next into drm-intel-next
Catching up on 6.9-rc2
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'arch/riscv/kvm/vcpu_insn.c')
-rw-r--r-- | arch/riscv/kvm/vcpu_insn.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/riscv/kvm/vcpu_insn.c b/arch/riscv/kvm/vcpu_insn.c index 7a6abed41bc1..ee7215f4071f 100644 --- a/arch/riscv/kvm/vcpu_insn.c +++ b/arch/riscv/kvm/vcpu_insn.c @@ -7,6 +7,8 @@ #include <linux/bitops.h> #include <linux/kvm_host.h> +#include <asm/cpufeature.h> + #define INSN_OPCODE_MASK 0x007c #define INSN_OPCODE_SHIFT 2 #define INSN_OPCODE_SYSTEM 28 @@ -213,9 +215,20 @@ struct csr_func { unsigned long wr_mask); }; +static int seed_csr_rmw(struct kvm_vcpu *vcpu, unsigned int csr_num, + unsigned long *val, unsigned long new_val, + unsigned long wr_mask) +{ + if (!riscv_isa_extension_available(vcpu->arch.isa, ZKR)) + return KVM_INSN_ILLEGAL_TRAP; + + return KVM_INSN_EXIT_TO_USER_SPACE; +} + static const struct csr_func csr_funcs[] = { KVM_RISCV_VCPU_AIA_CSR_FUNCS KVM_RISCV_VCPU_HPMCOUNTER_CSR_FUNCS + { .base = CSR_SEED, .count = 1, .func = seed_csr_rmw }, }; /** |