diff options
| author | Eduardo Habkost <ehabkost@redhat.com> | 2018-12-17 22:34:18 -0200 |
|---|---|---|
| committer | Ben Hutchings <ben@decadent.org.uk> | 2019-02-11 17:54:28 +0000 |
| commit | caeabc24a69a91724e3210d60bce838323d92755 (patch) | |
| tree | d8905f6dfff686f87d307585c10649e117591ac9 /arch/x86/include | |
| parent | f082d564d99bd33b95fc2f51170bfb49d2e29744 (diff) | |
kvm: x86: Add AMD's EX_CFG to the list of ignored MSRs
commit 0e1b869fff60c81b510c2d00602d778f8f59dd9a upstream.
Some guests OSes (including Windows 10) write to MSR 0xc001102c
on some cases (possibly while trying to apply a CPU errata).
Make KVM ignore reads and writes to that MSR, so the guest won't
crash.
The MSR is documented as "Execution Unit Configuration (EX_CFG)",
at AMD's "BIOS and Kernel Developer's Guide (BKDG) for AMD Family
15h Models 00h-0Fh Processors".
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Diffstat (limited to 'arch/x86/include')
| -rw-r--r-- | arch/x86/include/uapi/asm/msr-index.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/include/uapi/asm/msr-index.h b/arch/x86/include/uapi/asm/msr-index.h index bde8fb38d06e..c0e06e5e47a0 100644 --- a/arch/x86/include/uapi/asm/msr-index.h +++ b/arch/x86/include/uapi/asm/msr-index.h @@ -236,6 +236,7 @@ #define MSR_F15H_PERF_CTR 0xc0010201 #define MSR_F15H_NB_PERF_CTL 0xc0010240 #define MSR_F15H_NB_PERF_CTR 0xc0010241 +#define MSR_F15H_EX_CFG 0xc001102c /* Fam 10h MSRs */ #define MSR_FAM10H_MMIO_CONF_BASE 0xc0010058 |