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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-02-22 12:11:54 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-02-22 12:11:54 -0800 |
| commit | 9b3e7c9b9ab5c2827c1ecd45327b851a1bd01c2a (patch) | |
| tree | f90e1f70b73dd04c5f0c820f41b9d3cc307ad85a /arch/x86/kernel/cpu/perf_event_intel.c | |
| parent | 0f0ca14386e0431fbedaae5efc550d46cf93b9cf (diff) | |
| parent | a9d3f94ec7708427b9f05a65246d3fd6e287fa51 (diff) | |
Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf fixes from Ingo Molnar:
"Misc fixlets from all around the place"
* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf/x86/uncore: Fix IVT/SNB-EP uncore CBOX NID filter table
perf/x86: Correctly use FEATURE_PDCM
perf, nmi: Fix unknown NMI warning
perf trace: Fix ioctl 'request' beautifier build problems on !(i386 || x86_64) arches
perf trace: Add fallback definition of EFD_SEMAPHORE
perf list: Fix checking for supported events on older kernels
perf tools: Handle PERF_RECORD_HEADER_EVENT_TYPE properly
perf probe: Do not add offset twice to uprobe address
perf/x86: Fix Userspace RDPMC switch
perf/x86/intel/p6: Add userspace RDPMC quirk for PPro
Diffstat (limited to 'arch/x86/kernel/cpu/perf_event_intel.c')
| -rw-r--r-- | arch/x86/kernel/cpu/perf_event_intel.c | 11 |
1 files changed, 3 insertions, 8 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index 0fa4f242f050..aa333d966886 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c @@ -1361,10 +1361,8 @@ static int intel_pmu_handle_irq(struct pt_regs *regs) intel_pmu_disable_all(); handled = intel_pmu_drain_bts_buffer(); status = intel_pmu_get_status(); - if (!status) { - intel_pmu_enable_all(0); - return handled; - } + if (!status) + goto done; loops = 0; again: @@ -2310,10 +2308,7 @@ __init int intel_pmu_init(void) if (version > 1) x86_pmu.num_counters_fixed = max((int)edx.split.num_counters_fixed, 3); - /* - * v2 and above have a perf capabilities MSR - */ - if (version > 1) { + if (boot_cpu_has(X86_FEATURE_PDCM)) { u64 capabilities; rdmsrl(MSR_IA32_PERF_CAPABILITIES, capabilities); |