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authorDave Airlie <airlied@redhat.com>2017-12-21 11:17:45 +1000
committerDave Airlie <airlied@redhat.com>2017-12-21 11:17:45 +1000
commitdf2869abd92b740af141ee2eb081bfc69bd80877 (patch)
tree61088b24d70246d16fd3d3e04d022255076decc5 /drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
parent991eecc1c0743be7b942367af36637796e578e08 (diff)
parent4f4b94ee616500f326650f5b25439f1f7d606ea7 (diff)
Merge branch 'drm-next-4.16' of git://people.freedesktop.org/~agd5f/linux into drm-next
* 'drm-next-4.16' of git://people.freedesktop.org/~agd5f/linux: (171 commits) drm/amdgpu: fix test for shadow page tables drm/amd/display: Expose dpp1_set_cursor_attributes drm/amd/display: Update FMT and OPPBUF functions drm/amd/display: check for null before calling is_blanked drm/amd/display: dal 3.1.27 drm/amd/display: Fix unused variable warnings. drm/amd/display: Only blank DCN when we have set_blank implementation drm/amd/display: Put dcn_mi_registers with other structs drm/amd/display: hubp refactor drm/amd/display: integrating optc pseudocode drm/amd/display: Call validate_fbc should_enable_fbc drm/amd/display: Clean up DCN cursor code drm/amd/display: fix 180 full screen pipe split drm/amd/display: reprogram surface config on scaling change drm/amd/display: Remove dwbc from pipe_ctx drm/amd/display: Use the maximum link setting which EDP reported. drm/amd/display: Add hdr_supported flag drm/amd/display: fix global sync param retrieval when not pipe splitting drm/amd/display: Update HUBP drm/amd/display: fix rotated surface scaling ...
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 4cea9ab237ac..5e539fc5b05f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -343,7 +343,12 @@ static int amdgpu_cs_bo_validate(struct amdgpu_cs_parser *p,
struct amdgpu_bo *bo)
{
struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
- struct ttm_operation_ctx ctx = { true, false };
+ struct ttm_operation_ctx ctx = {
+ .interruptible = true,
+ .no_wait_gpu = false,
+ .allow_reserved_eviction = false,
+ .resv = bo->tbo.resv
+ };
uint32_t domain;
int r;
@@ -1150,7 +1155,7 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
union drm_amdgpu_cs *cs)
{
struct amdgpu_ring *ring = p->job->ring;
- struct amd_sched_entity *entity = &p->ctx->rings[ring->idx].entity;
+ struct drm_sched_entity *entity = &p->ctx->rings[ring->idx].entity;
struct amdgpu_job *job;
unsigned i;
uint64_t seq;
@@ -1173,7 +1178,7 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
job = p->job;
p->job = NULL;
- r = amd_sched_job_init(&job->base, &ring->sched, entity, p->filp);
+ r = drm_sched_job_init(&job->base, &ring->sched, entity, p->filp);
if (r) {
amdgpu_job_free(job);
amdgpu_mn_unlock(p->mn);
@@ -1202,7 +1207,7 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
amdgpu_ring_priority_get(job->ring, job->base.s_priority);
trace_amdgpu_cs_ioctl(job);
- amd_sched_entity_push_job(&job->base, entity);
+ drm_sched_entity_push_job(&job->base, entity);
ttm_eu_fence_buffer_objects(&p->ticket, &p->validated, p->fence);
amdgpu_mn_unlock(p->mn);