Merge branch 'drm-next-4.7' of git://people.freedesktop.org/~agd5f/linux into drm-next

This is the first big radeon/amdgpu pull request for 4.7.  Highlights:
    - Polaris support in amdgpu
      Current display stack on par with other asics, for advanced features DAL is required
      Power management support
      Support for GFX, Compute, SDMA, UVD, VCE
    - VCE and UVD init/fini cleanup in radeon
    - GPUVM improvements
    - Scheduler improvements
    - Clockgating improvements
    - Powerplay improvements
    - TTM changes to support driver specific LRU update mechanism
    - Radeon support for new Mesa features
    - ASYNC pageflip support for radeon
    - Lots of bug fixes and code cleanups

* 'drm-next-4.7' of git://people.freedesktop.org/~agd5f/linux: (180 commits)
  drm/amdgpu: Replace rcu_assign_pointer() with RCU_INIT_POINTER()
  drm/amdgpu: use drm_mode_vrefresh() rather than mode->vrefresh
  drm/amdgpu/uvd6: add bypass support for fiji (v3)
  drm/amdgpu/fiji: set UVD CG state when enabling UVD DPM (v2)
  drm/powerplay: add missing clockgating callback for tonga
  drm/amdgpu: Constify some tables
  drm/amd/powerplay: Delete dead struct declaration
  drm/amd/powerplay/hwmgr: don't add invalid voltage
  drm/amd/powerplay/hwmgr: prevent VDDC from exceeding 2V
  MAINTAINERS: Remove unneded wildcard for the Radeon/AMDGPU drivers
  drm/radeon: add cayman VM support for append packet.
  drm/amd/amdgpu: Add debugfs entries for smc/didt/pcie
  drm/amd/amdgpu: Drop print_status callbacks.
  drm/amd/powerplay: revise reading/writing pptable on Polaris10
  drm/amd/powerplay: revise reading/writing pptable on Tonga
  drm/amd/powerplay: revise reading/writing pptable on Fiji
  drm/amd/powerplay: revise caching the soft pptable and add it's size
  drm/amd/powerplay: add dpm force multiple levels on cz/tonga/fiji/polaris (v2)
  drm/amd/powerplay: fix fan speed percent setting error on Polaris10
  drm/amd/powerplay: fix bug dpm can't work when resume back on Polaris
  ...

1 files changed, 42 insertions, 7 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
index 9c9b19e2f353..4eea2a18d8bb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
@@ -28,6 +28,23 @@
 #include "amdgpu.h"
 #include "amdgpu_trace.h"
 
+static void amdgpu_job_free_handler(struct work_struct *ws)
+{
+	struct amdgpu_job *job = container_of(ws, struct amdgpu_job, base.work_free_job);
+	amd_sched_job_put(&job->base);
+}
+
+void amdgpu_job_timeout_func(struct work_struct *work)
+{
+	struct amdgpu_job *job = container_of(work, struct amdgpu_job, base.work_tdr.work);
+	DRM_ERROR("ring %s timeout, last signaled seq=%u, last emitted seq=%u\n",
+				job->base.sched->name,
+				(uint32_t)atomic_read(&job->ring->fence_drv.last_seq),
+				job->ring->fence_drv.sync_seq);
+
+	amd_sched_job_put(&job->base);
+}
+
 int amdgpu_job_alloc(struct amdgpu_device *adev, unsigned num_ibs,
 		     struct amdgpu_job **job)
 {
@@ -45,6 +62,7 @@ int amdgpu_job_alloc(struct amdgpu_device *adev, unsigned num_ibs,
 	(*job)->adev = adev;
 	(*job)->ibs = (void *)&(*job)[1];
 	(*job)->num_ibs = num_ibs;
+	INIT_WORK(&(*job)->base.work_free_job, amdgpu_job_free_handler);
 
 	amdgpu_sync_create(&(*job)->sync);
 
@@ -80,6 +98,14 @@ void amdgpu_job_free(struct amdgpu_job *job)
 
 	amdgpu_bo_unref(&job->uf.bo);
 	amdgpu_sync_free(&job->sync);
+
+	if (!job->base.use_sched)
+		kfree(job);
+}
+
+void amdgpu_job_free_func(struct kref *refcount)
+{
+	struct amdgpu_job *job = container_of(refcount, struct amdgpu_job, base.refcount);
 	kfree(job);
 }
 
@@ -87,16 +113,23 @@ int amdgpu_job_submit(struct amdgpu_job *job, struct amdgpu_ring *ring,
 		      struct amd_sched_entity *entity, void *owner,
 		      struct fence **f)
 {
+	struct fence *fence;
+	int r;
 	job->ring = ring;
-	job->base.sched = &ring->sched;
-	job->base.s_entity = entity;
-	job->base.s_fence = amd_sched_fence_create(job->base.s_entity, owner);
-	if (!job->base.s_fence)
-		return -ENOMEM;
 
-	*f = fence_get(&job->base.s_fence->base);
+	if (!f)
+		return -EINVAL;
+
+	r = amd_sched_job_init(&job->base, &ring->sched,
+							entity,
+							amdgpu_job_timeout_func,
+							amdgpu_job_free_func,
+							owner, &fence);
+	if (r)
+		return r;
 
 	job->owner = owner;
+	*f = fence_get(fence);
 	amd_sched_entity_push_job(&job->base);
 
 	return 0;
@@ -165,7 +198,9 @@ err:
 	return fence;
 }
 
-struct amd_sched_backend_ops amdgpu_sched_ops = {
+const struct amd_sched_backend_ops amdgpu_sched_ops = {
 	.dependency = amdgpu_job_dependency,
 	.run_job = amdgpu_job_run,
+	.begin_job = amd_sched_job_begin,
+	.finish_job = amd_sched_job_finish,
 };