diff options
| author | Feifei Xu <Feifei.Xu@amd.com> | 2018-05-11 14:54:50 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-08-27 11:10:34 -0500 |
| commit | 654f761cfa0454bbfdf50d5ed6dc004c92114a97 (patch) | |
| tree | 94501dfb03b7f49b00566199463710a6c7bf3660 /drivers/gpu/drm/amd/amdgpu/soc15.c | |
| parent | a6637313c7bf013d30fc7d501a19a93fddab7b5f (diff) | |
drm/amdgpu: Add psp 11.0 support for vega20. (v2)
Add psp 11.0 code for vega20 and enable it. PSP is the
security processor for the GPU. It handles firmware
loading and GPU resets among other things.
v2: whitespace fix, enable support, adjust reg includes (Alex)
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/soc15.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/soc15.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c index dd44b50242ac..fc0cb7d38c9f 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15.c +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c @@ -518,9 +518,10 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev) amdgpu_device_ip_block_add(adev, &vega10_common_ip_block); amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block); amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block); - if (adev->asic_type != CHIP_VEGA20) { + if (adev->asic_type == CHIP_VEGA20) + amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block); + else amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block); - } if (!amdgpu_sriov_vf(adev)) amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) |