diff options
| author | Yiling Chen <yi-ling.chen2@amd.com> | 2025-03-04 16:52:16 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2025-04-21 11:26:59 -0400 |
| commit | f53d0f48a89ccf13a1598985ab1782ec105cb049 (patch) | |
| tree | a551b3caf78b6aa047bf9fb29befbdcf83f6b687 /drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c | |
| parent | eec64449233b58f44154ecb9417e53fceb1e93a1 (diff) | |
drm/amd/display: To apply the adjusted DP ref clock for DP devices
[Why]
For some pixel clock margin sensitive external monitor,
we could not keep original DP ref clock for the ASICs
supported SSC DP ref clock.
[How]
From slicon design team's comment,
we have to apply the adjusted DP ref clock for
DP devices.
DP 128b (DP2) signals uses the DTBCLK not DP ref.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Yiling Chen <yi-ling.chen2@amd.com>
Signed-off-by: Zaeem Mohamed <zaeem.mohamed@amd.com>
Tested-by: Mark Broadworth <mark.broadworth@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c')
0 files changed, 0 insertions, 0 deletions