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authorDave Airlie <airlied@redhat.com>2018-02-16 09:23:12 +1000
committerDave Airlie <airlied@redhat.com>2018-02-16 09:23:12 +1000
commitf0308d76906a5b65ec4fcc3b133394caa9f00638 (patch)
treecbf00ce8143b451601c892d2e21d8f09ae096ae7 /drivers/gpu/drm/i915/intel_sprite.c
parent7928b2cbe55b2a410a0f5c1f154610059c57b1b2 (diff)
parent2f2f2db86d63605b1f57780ead21d4968e9d0bf3 (diff)
Merge tag 'drm-intel-next-2018-02-07' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
UAPI Changes: - Userspace whitelist register GEN9_SLICE_COMMON_ECO_CHICKEN1 for GLK (Kenneth) - Non-existent PMU counters are not placed to sysfs (Tvrtko) - Add a note to deprecate I915_SET_COLORKEY_NONE and ignore it (Ville) * Intel DDX never ended using it, and implementation was wonky Core Changes: - Moved away from struct timeval into ktime_t in prep for 2038 (Arnd) * Merged the i915 portion through drm-tip, no core dependencies Driver Changes: - Base support for Icelake and Icelake PCH (Anusha, Rodrigo, Mahesh, Paulo, James, Kelvin) - Add AUX-F port support for Cannonlake (Rodrigo) - New DMC firmware for 1.07 Cannonlake (Anusha) * Go to linux-firmware.git to get it - Reject non-cursor planes nearly (3 px) out of screen on GLK/CNL (Imre) - Y/Yf modifiers restored for SKL+ sprites (Ville) - Compressed framebuffer support for sprites (Ville) - Tune down overly aggressive shrinking (Chris) - Shrink kmem caches when GPU is idle (Chris) - EDID bit-banging fallback for HDMI EDID (Stefan) - Don't boost the GPU when the waited request is already running (Chris) - Avoid GLK/BXT CDCLK frequency locking timeouts (Imre) - Limit DP link rate according to VBT on CNL+ (Jani) - Skip post-reset request emission if the engine is not idle (Chris) - Report any link training error on a fixed eDP panel as errors (Manasi) - DSI panel fixes for Bay Trail (Hans) - Selftest additions and improvements (Chris, Matt) - DMA fence test additions and accompanying fixes (Chris) - Power domain vs. register access fix (Maarten) - Squelch warnings for people with teensy framebuffers (stride < 512) (Maarten) - Increase Render/Media power gating hysteresis for Gen9+ (Chris) - HDMI vswing display workaround for Gen9+ (Ville) - GuC code cleanup and lockdep fixes (Sagar, Michal Wa.) - Continuously run hangcheck for simplicity (Chris) - Execlist debugging improvements (Chris) - GuC debugging improvements (Sujaritha, Michal Wa., Sagar) - Command parser boundary checks (Michal Srb) - Add a workaround for 3DSTATE_SAMPLE_PATTERN on CNL (Rafael) - Fix PMU enabling race condition (Tvrtko) - Usual smaller testing and debugging improvements * tag 'drm-intel-next-2018-02-07' of git://anongit.freedesktop.org/drm/drm-intel: (158 commits) drm/i915: Update DRIVER_DATE to 20180207 drm/i915/pmu: Fix PMU enable vs execlists tasklet race drm/i915/cnl: WaPipeControlBefore3DStateSamplePattern drm/i915/cmdparser: Do not check past the cmd length. drm/i915/cmdparser: Check reg_table_count before derefencing. drm/i915: Deprecate I915_SET_COLORKEY_NONE drm/i915: Skip post-reset request emission if the engine is not idle drm/i915/execlists: Move the reset bits to a more natural home drm/i915/selftests: Use a sacrificial context for hang testing drm/i915/selftests: Flush old resets between engines drm/i915/breadcrumbs: Drop request reference for the signaler thread drm/i915: Remove unbannable context spam from reset drm/i915/execlists: Remove the startup spam drm/i915: Show the GPU state when declaring wedged drm/i915: Always update the no_fbc_reason when disabling drm/i915: Add some newlines to intel_engine_dump() headers drm/i915: Report if an unbannable context is involved in a GPU hang drm/i915: Remove spurious DRM_ERROR for cancelled interrupts drm/i915/execlists: Flush GTIIR on clearing CS interrupts during reset drm/i915: reduce indent in pch detection ...
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sprite.c')
-rw-r--r--drivers/gpu/drm/i915/intel_sprite.c112
1 files changed, 76 insertions, 36 deletions
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index dd485f59eb1d..32f10621fac8 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -865,6 +865,7 @@ intel_check_sprite_plane(struct intel_plane *plane,
struct drm_rect *src = &state->base.src;
struct drm_rect *dst = &state->base.dst;
const struct drm_rect *clip = &state->clip;
+ int max_stride = INTEL_GEN(dev_priv) >= 9 ? 32768 : 16384;
int hscale, vscale;
int max_scale, min_scale;
bool can_scale;
@@ -885,7 +886,7 @@ intel_check_sprite_plane(struct intel_plane *plane,
}
/* FIXME check all gen limits */
- if (fb->width < 3 || fb->height < 3 || fb->pitches[0] > 16384) {
+ if (fb->width < 3 || fb->height < 3 || fb->pitches[0] > max_stride) {
DRM_DEBUG_KMS("Unsuitable framebuffer for plane\n");
return -EINVAL;
}
@@ -893,7 +894,7 @@ intel_check_sprite_plane(struct intel_plane *plane,
/* setup can_scale, min_scale, max_scale */
if (INTEL_GEN(dev_priv) >= 9) {
/* use scaler when colorkey is not required */
- if (state->ckey.flags == I915_SET_COLORKEY_NONE) {
+ if (!state->ckey.flags) {
can_scale = 1;
min_scale = 1;
max_scale = skl_max_scale(crtc, crtc_state);
@@ -1027,7 +1028,7 @@ intel_check_sprite_plane(struct intel_plane *plane,
dst->y2 = crtc_y + crtc_h;
if (INTEL_GEN(dev_priv) >= 9) {
- ret = skl_check_plane_surface(state);
+ ret = skl_check_plane_surface(crtc_state, state);
if (ret)
return ret;
@@ -1069,6 +1070,9 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
struct drm_modeset_acquire_ctx ctx;
int ret = 0;
+ /* ignore the pointless "none" flag */
+ set->flags &= ~I915_SET_COLORKEY_NONE;
+
/* Make sure we don't try to enable both src & dest simultaneously */
if ((set->flags & (I915_SET_COLORKEY_DESTINATION | I915_SET_COLORKEY_SOURCE)) == (I915_SET_COLORKEY_DESTINATION | I915_SET_COLORKEY_SOURCE))
return -EINVAL;
@@ -1161,18 +1165,27 @@ static uint32_t skl_plane_formats[] = {
DRM_FORMAT_VYUY,
};
-static const uint64_t skl_plane_format_modifiers[] = {
+static const uint64_t skl_plane_format_modifiers_noccs[] = {
+ I915_FORMAT_MOD_Yf_TILED,
+ I915_FORMAT_MOD_Y_TILED,
I915_FORMAT_MOD_X_TILED,
DRM_FORMAT_MOD_LINEAR,
DRM_FORMAT_MOD_INVALID
};
-static bool g4x_sprite_plane_format_mod_supported(struct drm_plane *plane,
- uint32_t format,
- uint64_t modifier)
+static const uint64_t skl_plane_format_modifiers_ccs[] = {
+ I915_FORMAT_MOD_Yf_TILED_CCS,
+ I915_FORMAT_MOD_Y_TILED_CCS,
+ I915_FORMAT_MOD_Yf_TILED,
+ I915_FORMAT_MOD_Y_TILED,
+ I915_FORMAT_MOD_X_TILED,
+ DRM_FORMAT_MOD_LINEAR,
+ DRM_FORMAT_MOD_INVALID
+};
+
+static bool g4x_mod_supported(uint32_t format, uint64_t modifier)
{
switch (format) {
- case DRM_FORMAT_XBGR8888:
case DRM_FORMAT_XRGB8888:
case DRM_FORMAT_YUYV:
case DRM_FORMAT_YVYU:
@@ -1187,22 +1200,38 @@ static bool g4x_sprite_plane_format_mod_supported(struct drm_plane *plane,
}
}
-static bool vlv_sprite_plane_format_mod_supported(struct drm_plane *plane,
- uint32_t format,
- uint64_t modifier)
+static bool snb_mod_supported(uint32_t format, uint64_t modifier)
{
switch (format) {
+ case DRM_FORMAT_XRGB8888:
+ case DRM_FORMAT_XBGR8888:
case DRM_FORMAT_YUYV:
case DRM_FORMAT_YVYU:
case DRM_FORMAT_UYVY:
case DRM_FORMAT_VYUY:
+ if (modifier == DRM_FORMAT_MOD_LINEAR ||
+ modifier == I915_FORMAT_MOD_X_TILED)
+ return true;
+ /* fall through */
+ default:
+ return false;
+ }
+}
+
+static bool vlv_mod_supported(uint32_t format, uint64_t modifier)
+{
+ switch (format) {
case DRM_FORMAT_RGB565:
- case DRM_FORMAT_XRGB8888:
+ case DRM_FORMAT_ABGR8888:
case DRM_FORMAT_ARGB8888:
+ case DRM_FORMAT_XBGR8888:
+ case DRM_FORMAT_XRGB8888:
case DRM_FORMAT_XBGR2101010:
case DRM_FORMAT_ABGR2101010:
- case DRM_FORMAT_XBGR8888:
- case DRM_FORMAT_ABGR8888:
+ case DRM_FORMAT_YUYV:
+ case DRM_FORMAT_YVYU:
+ case DRM_FORMAT_UYVY:
+ case DRM_FORMAT_VYUY:
if (modifier == DRM_FORMAT_MOD_LINEAR ||
modifier == I915_FORMAT_MOD_X_TILED)
return true;
@@ -1212,16 +1241,17 @@ static bool vlv_sprite_plane_format_mod_supported(struct drm_plane *plane,
}
}
-static bool skl_sprite_plane_format_mod_supported(struct drm_plane *plane,
- uint32_t format,
- uint64_t modifier)
+static bool skl_mod_supported(uint32_t format, uint64_t modifier)
{
- /* This is the same as primary plane since SKL has universal planes */
switch (format) {
case DRM_FORMAT_XRGB8888:
case DRM_FORMAT_XBGR8888:
case DRM_FORMAT_ARGB8888:
case DRM_FORMAT_ABGR8888:
+ if (modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
+ modifier == I915_FORMAT_MOD_Y_TILED_CCS)
+ return true;
+ /* fall through */
case DRM_FORMAT_RGB565:
case DRM_FORMAT_XRGB2101010:
case DRM_FORMAT_XBGR2101010:
@@ -1257,13 +1287,13 @@ static bool intel_sprite_plane_format_mod_supported(struct drm_plane *plane,
return false;
if (INTEL_GEN(dev_priv) >= 9)
- return skl_sprite_plane_format_mod_supported(plane, format, modifier);
+ return skl_mod_supported(format, modifier);
else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
- return vlv_sprite_plane_format_mod_supported(plane, format, modifier);
+ return vlv_mod_supported(format, modifier);
+ else if (INTEL_GEN(dev_priv) >= 6)
+ return snb_mod_supported(format, modifier);
else
- return g4x_sprite_plane_format_mod_supported(plane, format, modifier);
-
- unreachable();
+ return g4x_mod_supported(format, modifier);
}
static const struct drm_plane_funcs intel_sprite_plane_funcs = {
@@ -1277,6 +1307,23 @@ static const struct drm_plane_funcs intel_sprite_plane_funcs = {
.format_mod_supported = intel_sprite_plane_format_mod_supported,
};
+bool skl_plane_has_ccs(struct drm_i915_private *dev_priv,
+ enum pipe pipe, enum plane_id plane_id)
+{
+ if (plane_id == PLANE_CURSOR)
+ return false;
+
+ if (INTEL_GEN(dev_priv) >= 10)
+ return true;
+
+ if (IS_GEMINILAKE(dev_priv))
+ return pipe != PIPE_C;
+
+ return pipe != PIPE_C &&
+ (plane_id == PLANE_PRIMARY ||
+ plane_id == PLANE_SPRITE0);
+}
+
struct intel_plane *
intel_sprite_plane_create(struct drm_i915_private *dev_priv,
enum pipe pipe, int plane)
@@ -1303,7 +1350,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
}
intel_plane->base.state = &state->base;
- if (INTEL_GEN(dev_priv) >= 10) {
+ if (INTEL_GEN(dev_priv) >= 9) {
intel_plane->can_scale = true;
state->scaler_id = -1;
@@ -1313,18 +1360,11 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
plane_formats = skl_plane_formats;
num_plane_formats = ARRAY_SIZE(skl_plane_formats);
- modifiers = skl_plane_format_modifiers;
- } else if (INTEL_GEN(dev_priv) >= 9) {
- intel_plane->can_scale = true;
- state->scaler_id = -1;
- intel_plane->update_plane = skl_update_plane;
- intel_plane->disable_plane = skl_disable_plane;
- intel_plane->get_hw_state = skl_plane_get_hw_state;
-
- plane_formats = skl_plane_formats;
- num_plane_formats = ARRAY_SIZE(skl_plane_formats);
- modifiers = skl_plane_format_modifiers;
+ if (skl_plane_has_ccs(dev_priv, pipe, PLANE_SPRITE0 + plane))
+ modifiers = skl_plane_format_modifiers_ccs;
+ else
+ modifiers = skl_plane_format_modifiers_noccs;
} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
intel_plane->can_scale = false;
intel_plane->max_downscale = 1;
@@ -1386,7 +1426,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
intel_plane->pipe = pipe;
intel_plane->i9xx_plane = plane;
intel_plane->id = PLANE_SPRITE0 + plane;
- intel_plane->frontbuffer_bit = INTEL_FRONTBUFFER_SPRITE(pipe, plane);
+ intel_plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, intel_plane->id);
intel_plane->check_plane = intel_check_sprite_plane;
possible_crtcs = (1 << pipe);