Merge tag 'nand/for-6.6' into mtd/next

Raw NAND core changes:
* Fix -Wvoid-pointer-to-enum-cast warning
* Export 'nand_exit_status_op()'
* dt-bindings: Fix nand-controller.yaml license

Raw NAND controller driver changes:
* Omap, Omap2, Samsung, Atmel, fsl_upm, lpc32xx_slc, lpc32xx_mlc, STM32_FMC2,
  sh_ftlctl, MXC, Sunxi:
  - Use devm_platform_get_and_ioremap_resource()
* Orion, vf610_nfc, Sunxi, STM32_FMC2, MTK, mpc5121, lpc32xx_slc, Intel,
  FSMC, Arasan:
  - Use helper function devm_clk_get_optional_enabled()
* Brcmnand:
  - Use devm_platform_ioremap_resource_byname()
  - Propagate init error -EPROBE_DEFER up
  - Propagate error and simplify ternary operators
  - Fix mtd oobsize
  - Fix potential out-of-bounds access in oob write
  - Fix crash during the panic_write
  - Fix potential false time out warning
  - Fix ECC level field setting for v7.2 controller
* fsmc: Handle clk prepare error in fsmc_nand_resume()
* Marvell: Add support for AC5 SoC
* Meson:
  - Support for 512B ECC step size
  - Fix build error
  - Use NAND core API to check status
  - dt-bindings:
    * Make ECC properties dependent
    * Support for 512B ECC step size
    * Drop unneeded quotes
* Oxnas: Remove driver and bindings
* Qcom:
  - Conversion to ->exec_op()
  - Removal of the legacy interface
  - Two full series of improvements/misc fixes
    * Use the BIT() macro
    * Use u8 instead of uint8_t
    * Fix alignment with open parenthesis
    * Fix the spacing
    * Fix wrong indentation
    * Fix a typo
    * Early structure initialization
    * Fix address parsing within ->exec_op()
    * Remove superfluous initialization of "ret"
    * Rename variables in qcom_op_cmd_mapping()
    * Handle unsupported opcode in qcom_op_cmd_mapping()
    * Fix the opcode check in qcom_check_op()
    * Use EOPNOTSUPP instead of ENOTSUPP
    * Wrap qcom_nand_exec_op() to 80 columns
    * Unmap sg_list and free desc within submic_descs()
    * Simplify the call to nand_prog_page_end_op()
    * Do not override the error no of submit_descs()
    * Sort includes alphabetically
    * Clear buf_count and buf_start in raw read
    * Add read/read_start ops in exec_op path
* vf610_nfc: Do not check 0 for platform_get_irq()

SPI-NAND changes:
* gigadevice: Add support for GD5F1GQ{4,5}RExxH
* esmt: Add support for F50D2G41KA
* toshiba: Add support for T{C,H}58NYG{0,2}S3HBAI4 and TH58NYG3S0HBAI6

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

1 files changed, 9 insertions, 10 deletions

diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c
index 7b4742420dfc..811982da3557 100644
--- a/drivers/mtd/nand/raw/fsmc_nand.c
+++ b/drivers/mtd/nand/raw/fsmc_nand.c
@@ -1066,16 +1066,12 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
 	host->regs_va = base + FSMC_NOR_REG_SIZE +
 		(host->bank * FSMC_NAND_BANK_SZ);
 
-	host->clk = devm_clk_get(&pdev->dev, NULL);
+	host->clk = devm_clk_get_enabled(&pdev->dev, NULL);
 	if (IS_ERR(host->clk)) {
 		dev_err(&pdev->dev, "failed to fetch block clock\n");
 		return PTR_ERR(host->clk);
 	}
 
-	ret = clk_prepare_enable(host->clk);
-	if (ret)
-		return ret;
-
 	/*
 	 * This device ID is actually a common AMBA ID as used on the
 	 * AMBA PrimeCell bus. However it is not a PrimeCell.
@@ -1111,7 +1107,7 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
 		if (!host->read_dma_chan) {
 			dev_err(&pdev->dev, "Unable to get read dma channel\n");
 			ret = -ENODEV;
-			goto disable_clk;
+			goto disable_fsmc;
 		}
 		host->write_dma_chan = dma_request_channel(mask, filter, NULL);
 		if (!host->write_dma_chan) {
@@ -1155,9 +1151,8 @@ release_dma_write_chan:
 release_dma_read_chan:
 	if (host->mode == USE_DMA_ACCESS)
 		dma_release_channel(host->read_dma_chan);
-disable_clk:
+disable_fsmc:
 	fsmc_nand_disable(host);
-	clk_disable_unprepare(host->clk);
 
 	return ret;
 }
@@ -1182,7 +1177,6 @@ static void fsmc_nand_remove(struct platform_device *pdev)
 			dma_release_channel(host->write_dma_chan);
 			dma_release_channel(host->read_dma_chan);
 		}
-		clk_disable_unprepare(host->clk);
 	}
 }
 
@@ -1200,9 +1194,14 @@ static int fsmc_nand_suspend(struct device *dev)
 static int fsmc_nand_resume(struct device *dev)
 {
 	struct fsmc_nand_data *host = dev_get_drvdata(dev);
+	int ret;
 
 	if (host) {
-		clk_prepare_enable(host->clk);
+		ret = clk_prepare_enable(host->clk);
+		if (ret) {
+			dev_err(dev, "failed to enable clk\n");
+			return ret;
+		}
 		if (host->dev_timings)
 			fsmc_nand_setup(host, host->dev_timings);
 		nand_reset(&host->nand, 0);