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| author | Yevgeny Kliteynik <kliteyn@nvidia.com> | 2020-09-22 04:23:58 +0300 |
|---|---|---|
| committer | Saeed Mahameed <saeedm@nvidia.com> | 2021-01-29 18:12:52 -0800 |
| commit | f06d496985f49189dde4506d0ac15494d1a74607 (patch) | |
| tree | c318012e6de56d8caf0dbff0914bb08c6c02b259 /drivers/net/ethernet/intel/igc/igc_main.c | |
| parent | c349b4137cfd9482f30dcd726748d0c4da1427f3 (diff) | |
net/mlx5: DR, Use the right size when writing partial STE into HW
In these cases we need to update only the ctrl area of the STE.
So it is better to write only the control 32B and avoid copying
the unneeded reduced 48B (control 32B + tag 16B).
Signed-off-by: Erez Shitrit <erezsh@nvidia.com>
Signed-off-by: Alex Vesker <valex@nvidia.com>
Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'drivers/net/ethernet/intel/igc/igc_main.c')
0 files changed, 0 insertions, 0 deletions