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authorBjorn Helgaas <bhelgaas@google.com>2024-03-12 12:14:25 -0500
committerBjorn Helgaas <bhelgaas@google.com>2024-03-12 12:14:25 -0500
commit538ca00225663b5481effe94e816ff1aa5d49f66 (patch)
tree4a5d16612d3b32e5187de4f172e25a2f511ace09 /drivers/pci/controller/cadence/pcie-cadence.h
parentcab098b6f2531f26d447abd07ec7a77e2e442ec0 (diff)
parent667a006d73fb7320fc6f414b6fe11a998fcf0c28 (diff)
Merge branch 'pci/controller/cadence'
- Clear the ARI Capability Next Function Number of the last function (Jasko-EXT Wojciech) * pci/controller/cadence: PCI: cadence: Clear the ARI Capability Next Function Number of the last function
Diffstat (limited to 'drivers/pci/controller/cadence/pcie-cadence.h')
-rw-r--r--drivers/pci/controller/cadence/pcie-cadence.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/pci/controller/cadence/pcie-cadence.h b/drivers/pci/controller/cadence/pcie-cadence.h
index 03b96798f858..7a66a2f815dc 100644
--- a/drivers/pci/controller/cadence/pcie-cadence.h
+++ b/drivers/pci/controller/cadence/pcie-cadence.h
@@ -131,6 +131,12 @@
#define CDNS_PCIE_EP_FUNC_SRIOV_CAP_OFFSET 0x200
/*
+ * Endpoint PF Registers
+ */
+#define CDNS_PCIE_CORE_PF_I_ARI_CAP_AND_CTRL(fn) (0x144 + (fn) * 0x1000)
+#define CDNS_PCIE_ARI_CAP_NFN_MASK GENMASK(15, 8)
+
+/*
* Root Port Registers (PCI configuration space for the root port function)
*/
#define CDNS_PCIE_RP_BASE 0x00200000