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| author | Thomas Gleixner <tglx@linutronix.de> | 2017-06-20 22:08:32 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2017-06-20 22:08:32 +0200 |
| commit | b50fb7c99217922ea36d6e38bae34d84c0587cad (patch) | |
| tree | 5f46167ac7fe5cd87bbed8ca8644f32befc5bbae /drivers/perf/arm_pmu_acpi.c | |
| parent | 04c848d398797a626608ff48804d809ae6687163 (diff) | |
| parent | 41f1830f5a7af77cf5c86359aba3cbd706687e52 (diff) | |
Merge branch 'linus' into irq/core
Get upstream changes so pending patches won't conflict.
Diffstat (limited to 'drivers/perf/arm_pmu_acpi.c')
| -rw-r--r-- | drivers/perf/arm_pmu_acpi.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/perf/arm_pmu_acpi.c b/drivers/perf/arm_pmu_acpi.c index 34c862f213c7..0a9b78705ee8 100644 --- a/drivers/perf/arm_pmu_acpi.c +++ b/drivers/perf/arm_pmu_acpi.c @@ -29,6 +29,17 @@ static int arm_pmu_acpi_register_irq(int cpu) return -EINVAL; gsi = gicc->performance_interrupt; + + /* + * Per the ACPI spec, the MADT cannot describe a PMU that doesn't + * have an interrupt. QEMU advertises this by using a GSI of zero, + * which is not known to be valid on any hardware despite being + * valid per the spec. Take the pragmatic approach and reject a + * GSI of zero for now. + */ + if (!gsi) + return 0; + if (gicc->flags & ACPI_MADT_PERFORMANCE_IRQ_MODE) trigger = ACPI_EDGE_SENSITIVE; else |