diff options
| author | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2022-02-06 19:03:17 +0000 |
|---|---|---|
| committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2022-02-21 19:33:04 +0000 |
| commit | e0a3ae8e42edd856f3119ac21dd9fb94000342c0 (patch) | |
| tree | 6b61ce4f20bbaff538a9e0674cb8bad9b0954e43 /drivers/staging/iio | |
| parent | c27e1e1a2444939c1f2f8b5633083e2995692f28 (diff) | |
staging:iio:adc:ad7280a: Trivial comment formatting cleanup
IIO uses the
/*
* stuff
* more stuff
*/
multi-line style, so use that here as well.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Marcelo Schmitt <marcelo.schmitt1@gmail.com>
Link: https://lore.kernel.org/r/20220206190328.333093-10-jic23@kernel.org
Diffstat (limited to 'drivers/staging/iio')
| -rw-r--r-- | drivers/staging/iio/adc/ad7280a.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index c1ac46a8112e..e32526fbed5a 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -139,9 +139,10 @@ static unsigned int ad7280a_devaddr(unsigned int addr) ((addr & 0x10) >> 4); } -/* During a read a valid write is mandatory. - * So writing to the highest available address (Address 0x1F) - * and setting the address all parts bit to 0 is recommended +/* + * During a read a valid write is mandatory. + * So writing to the highest available address (Address 0x1F) and setting the + * address all parts bit to 0 is recommended. * So the TXVAL is AD7280A_DEVADDR_ALL + CRC */ #define AD7280A_READ_TXVAL 0xF800030A @@ -180,7 +181,7 @@ static unsigned char ad7280_calc_crc8(unsigned char *crc_tab, unsigned int val) crc = crc_tab[val >> 16 & 0xFF]; crc = crc_tab[crc ^ (val >> 8 & 0xFF)]; - return crc ^ (val & 0xFF); + return crc ^ (val & 0xFF); } static int ad7280_check_crc(struct ad7280_state *st, unsigned int val) @@ -193,12 +194,12 @@ static int ad7280_check_crc(struct ad7280_state *st, unsigned int val) return 0; } -/* After initiating a conversion sequence we need to wait until the - * conversion is done. The delay is typically in the range of 15..30 us - * however depending an the number of devices in the daisy chain and the - * number of averages taken, conversion delays and acquisition time options - * it may take up to 250us, in this case we better sleep instead of busy - * wait. +/* + * After initiating a conversion sequence we need to wait until the conversion + * is done. The delay is typically in the range of 15..30us however depending on + * the number of devices in the daisy chain, the number of averages taken, + * conversion delays and acquisition time options it may take up to 250us, in + * this case we better sleep instead of busy wait. */ static void ad7280_delay(struct ad7280_state *st) |