diff options
| author | Jouni Högander <jouni.hogander@intel.com> | 2024-03-19 14:33:24 +0200 |
|---|---|---|
| committer | Jouni Högander <jouni.hogander@intel.com> | 2024-03-28 15:04:41 +0200 |
| commit | b52c4093b0c9089b00b42823d41986a94d32e341 (patch) | |
| tree | 9aa577d79f7c8b0b040e5e261f4ef4ee4e91ddd1 /scripts/bpf_doc.py | |
| parent | f3b899f0b4b17fa0b20e27c23f78604d5686383d (diff) | |
drm/i915/psr: Move writing early transport pipe src
Currently PIPE_SRCSZ_ERLY_TPT is written in
intel_display.c:intel_set_pipe_src_size. This doesn't work as
intel_set_pipe_src_size is called only on modeset.
Bspec: 68927
Fixes: 3291bbb93e16 ("drm/i915/psr: Configure PIPE_SRCSZ_ERLY_TPT for psr2 early transport")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240319123327.1661097-3-jouni.hogander@intel.com
Diffstat (limited to 'scripts/bpf_doc.py')
0 files changed, 0 insertions, 0 deletions