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authorKai Vehmanen <kai.vehmanen@linux.intel.com>2020-03-25 16:12:32 -0500
committerMark Brown <broonie@kernel.org>2020-03-26 18:31:15 +0000
commitaae5a6e92f3f3411fdf6abcf41ecadd771abaa4b (patch)
treed6c051586addd2599a9cd29a4a1a6a4aa76864f6 /tools/perf/scripts/python
parent9ef91cad92ba75d17d5a5203230746c9d9009705 (diff)
ASoC: SOF: Intel: hda: do not leave clock gating off upon error
The misc clock gating (MISCBDCGE) is disabled for controller reset and reenabled once reset is complete. Fix the case when error happens during reset, and clock gating is left disabled. The clock gating should be reenabled also in this case. Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Link: https://lore.kernel.org/r/20200325211233.27394-5-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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