diff options
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_ppsmc.h | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 12 |
4 files changed, 19 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h index 267c4f6eb317..8acc17973577 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h @@ -239,6 +239,7 @@ enum smu_message_type SMU_MSG_PowerDownVcn, SMU_MSG_PowerUpJpeg, SMU_MSG_PowerDownJpeg, + SMU_MSG_BacoAudioD3PME, SMU_MSG_MAX_COUNT, }; @@ -687,6 +688,7 @@ struct smu_funcs int (*set_xgmi_pstate)(struct smu_context *smu, uint32_t pstate); int (*gfx_off_control)(struct smu_context *smu, bool enable); int (*register_irq_handler)(struct smu_context *smu); + int (*set_azalia_d3_pme)(struct smu_context *smu); }; #define smu_init_microcode(smu) \ @@ -893,6 +895,8 @@ struct smu_funcs ((smu)->ppt_funcs->get_thermal_temperature_range? (smu)->ppt_funcs->get_thermal_temperature_range((smu), (range)) : 0) #define smu_register_irq_handler(smu) \ ((smu)->funcs->register_irq_handler ? (smu)->funcs->register_irq_handler(smu) : 0) +#define smu_set_azalia_d3_pme(smu) \ + ((smu)->funcs->set_azalia_d3_pme ? (smu)->funcs->set_azalia_d3_pme((smu)) : 0) extern int smu_get_atom_data_table(struct smu_context *smu, uint32_t table, uint16_t *size, uint8_t *frev, uint8_t *crev, diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_ppsmc.h b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_ppsmc.h index 2cb063664557..373861ddccd0 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_ppsmc.h +++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_ppsmc.h @@ -118,8 +118,9 @@ #define PPSMC_MSG_SetGeminiApertureLow 0x44 #define PPSMC_MSG_GetVoltageByDpmOverdrive 0x45 +#define PPSMC_MSG_BacoAudioD3PME 0x48 -#define PPSMC_Message_Count 0x47 +#define PPSMC_Message_Count 0x49 typedef uint32_t PPSMC_Result; typedef uint32_t PPSMC_Msg; diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c index 0d8a359d79d3..b16ee40da7c8 100644 --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c @@ -114,6 +114,7 @@ static int navi10_message_map[SMU_MSG_MAX_COUNT] = { MSG_MAP(PowerDownVcn, PPSMC_MSG_PowerDownVcn), MSG_MAP(PowerUpJpeg, PPSMC_MSG_PowerUpJpeg), MSG_MAP(PowerDownJpeg, PPSMC_MSG_PowerDownJpeg), + MSG_MAP(BacoAudioD3PME, PPSMC_MSG_BacoAudioD3PME), }; static int navi10_clk_map[SMU_CLK_COUNT] = { diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c index 82e6076bbdb0..592bef55eb82 100644 --- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c @@ -1663,6 +1663,17 @@ static int smu_v11_0_register_irq_handler(struct smu_context *smu) return ret; } +static int smu_v11_0_set_azalia_d3_pme(struct smu_context *smu) +{ + int ret = 0; + + mutex_lock(&smu->mutex); + ret = smu_send_smc_msg(smu, SMU_MSG_BacoAudioD3PME); + mutex_unlock(&smu->mutex); + + return ret; +} + static const struct smu_funcs smu_v11_0_funcs = { .init_microcode = smu_v11_0_init_microcode, .load_microcode = smu_v11_0_load_microcode, @@ -1711,6 +1722,7 @@ static const struct smu_funcs smu_v11_0_funcs = { .set_xgmi_pstate = smu_v11_0_set_xgmi_pstate, .gfx_off_control = smu_v11_0_gfx_off_control, .register_irq_handler = smu_v11_0_register_irq_handler, + .set_azalia_d3_pme = smu_v11_0_set_azalia_d3_pme, }; void smu_v11_0_set_smu_funcs(struct smu_context *smu) |