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path:
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drivers
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drm
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i915
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display
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intel_dpll_mgr.c
Age
Commit message (
Expand
)
Author
2021-01-09
drm/i915/tgl: Fix Combo PHY DPLL fractional divider for 38.4MHz ref clock
Imre Deak
2020-09-15
drm/i915/pll: Centralize PLL_ENABLE register lookup
Anusha Srivatsa
2020-09-08
Merge tag 'v5.9-rc4' into drm-next
Dave Airlie
2020-08-23
treewide: Use fallthrough pseudo-keyword
Gustavo A. R. Silva
2020-08-17
drm/i915/rkl: Handle HTI
Matt Roper
2020-08-17
drm/i915/rkl: Add DPLL4 support
Matt Roper
2020-07-01
drm/i915/icl+: Simplify combo/TBT PLL calculation call-chain
Imre Deak
2020-07-01
drm/i915/tgl+: Fix TBT DPLL fractional divider for 38.4MHz ref clock
Imre Deak
2020-04-21
drm/i915/display/dpll_mgr: Prefer drm_WARN_ON over WARN_ON
Pankaj Bharadiya
2020-03-09
drm/i915: Fix documentation for intel_dpll_get_freq()
Imre Deak
2020-03-02
drm/i915: Unify the DPLL ref clock frequency tracking
Imre Deak
2020-03-02
drm/i915/hsw: Use the read-out WRPLL/SPLL state instead of reading out again
Imre Deak
2020-03-02
drm/i915/skl, cnl: Split out the WRPLL/LCPLL frequency calculation
Imre Deak
2020-03-02
drm/i915/hsw: Split out the WRPLL, LCPLL, SPLL frequency calculation
Imre Deak
2020-03-02
drm/i915/hsw: Split out the SPLL parameter calculation
Imre Deak
2020-03-02
drm/i915/hsw: Rename the get HDMI/DP DPLL funcs to get WRPLL/LCPLL
Imre Deak
2020-03-02
drm/i915/skl: Parametrize the DPLL ref clock instead of open-coding it
Imre Deak
2020-03-02
drm/i915: Move DPLL frequency calculation to intel_dpll_mgr.c
Imre Deak
2020-03-02
drm/i915: Move the DPLL vfunc inits after the func defines
Imre Deak
2020-03-02
drm/i915: Keep the global DPLL state in a DPLL specific struct
Imre Deak
2020-03-02
drm/i915: Move DPLL HW readout/sanitize fns to intel_dpll_mgr.c
Imre Deak
2020-03-02
drm/i915: Fix bounds check in intel_get_shared_dpll_id()
Imre Deak
2020-02-11
drm/i915/dpll_mgr: convert to drm_device based logging macros.
Wambui Karuga
2020-02-04
drm/i915/display/dpll_mgr: Make WARN* drm specific where drm_device ptr is av...
Pankaj Bharadiya
2020-01-27
drm/i915/dpll_mgr: use intel_de_*() functions for register access
Jani Nikula
2020-01-13
drm/i915: Pass intel_encoder to enc_to_*()
Ville Syrjälä
2019-11-01
drm/i915: Perform automated conversions for crtc uapi/hw split, base -> uapi.
Maarten Lankhorst
2019-10-25
drm/i915: Fix PCH reference clock for FDI on HSW/BDW
Ville Syrjälä
2019-10-09
drm/i915: Select DPLL's via mask
Matt Roper
2019-10-04
drm/i915/tgl: Add the Thunderbolt PLL divider values
Imre Deak
2019-09-27
drm/i915/tgl: Fix dkl link training
José Roberto de Souza
2019-09-25
drm/i915/tgl: Add dkl phy pll calculations
José Roberto de Souza
2019-09-25
drm/i915/tgl: re-indent code to prepare for DKL changes
Lucas De Marchi
2019-09-25
drm/i915/tgl: Add support for dkl pll write
Vandita Kulkarni
2019-09-25
drm/i915/tgl: Add initial dkl pll support
Lucas De Marchi
2019-09-23
drm/i915/tgl/pll: Set update_active_dpll
Clinton A Taylor
2019-09-02
drm/i915: Prefer encoder->name over port_name()
Ville Syrjälä
2019-08-16
drm/i915: Wrappers for display register waits
Daniele Ceraolo Spurio
2019-08-07
drm/i915: rename intel_drv.h to display/intel_display_types.h
Jani Nikula
2019-07-18
drm/i915/ehl: Use an id of 4 while accessing DPLL4's CR0 and CR1
Vivek Kasireddy
2019-07-11
drm/i915/tgl: Update DPLL clock reference register
José Roberto de Souza
2019-07-11
drm/i915/tgl: Add DPLL registers
Lucas De Marchi
2019-07-11
drm/i915/tgl: Add pll manager
Vandita Kulkarni
2019-07-11
drm/i915: Polish intel_shared_dpll_swap_state()
Ville Syrjälä
2019-07-10
drm/i915: Transition port type checks to phy checks
Matt Roper
2019-07-09
drm/i915/icl: Clear the shared port PLLs from the new crtc state
Imre Deak
2019-07-09
drm/i915: Clear the shared PLL from the put_dplls() hook
Imre Deak
2019-07-05
drm/i915/ehl: Add support for DPLL4 (v10)
Vivek Kasireddy
2019-07-03
drm/i915/display: Handle lost primary_port across suspend
Chris Wilson
2019-07-01
drm/i915: Keep the TypeC port mode fixed when the port is active
Imre Deak
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