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author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-09-09 09:05:33 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-09-09 09:05:33 -0700 |
commit | 89c5a9461d02613c829cf9beffdc3d3c6c3df401 (patch) | |
tree | e0c6ada024a32da3cd6bb4b4f0469d66e5df45c9 /arch/arc/mm/cache_arc700.c | |
parent | 833ae40b517a99e05fc4aea399e71f633f3348d2 (diff) | |
parent | 07b9b65147d1d7cc03b9ff1e1f3b1c163ba4d067 (diff) |
Merge tag 'arc-v3.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
Pull ARC changes from Vineet Gupta:
- ARC MM changes:
- preparation for MMUv4 (accomodate new PTE bits, new cmds)
- Rework the ASID allocation algorithm to remove asid-mm reverse map
- Boilerplate code consolidation in Exception Handlers
- Disable FRAME_POINTER for ARC
- Unaligned Access Emulation for Big-Endian from Noam
- Bunch of fixes (udelay, missing accessors) from Mischa
* tag 'arc-v3.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
ARC: fix new Section mismatches in build (post __cpuinit cleanup)
Kconfig.debug: Add FRAME_POINTER anti-dependency for ARC
ARC: Fix __udelay calculation
ARC: remove console_verbose() from setup_arch()
ARC: Add read*_relaxed to asm/io.h
ARC: Handle un-aligned user space access in BE.
ARC: [ASID] Track ASID allocation cycles/generations
ARC: [ASID] activate_mm() == switch_mm()
ARC: [ASID] get_new_mmu_context() to conditionally allocate new ASID
ARC: [ASID] Refactor the TLB paranoid debug code
ARC: [ASID] Remove legacy/unused debug code
ARC: No need to flush the TLB in early boot
ARC: MMUv4 preps/3 - Abstract out TLB Insert/Delete
ARC: MMUv4 preps/2 - Reshuffle PTE bits
ARC: MMUv4 preps/1 - Fold PTE K/U access flags
ARC: Code cosmetics (Nothing semantical)
ARC: Entry Handler tweaks: Optimize away redundant IRQ_DISABLE_SAVE
ARC: Exception Handlers Code consolidation
ARC: Add some .gitignore entries
Diffstat (limited to 'arch/arc/mm/cache_arc700.c')
-rw-r--r-- | arch/arc/mm/cache_arc700.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arc/mm/cache_arc700.c b/arch/arc/mm/cache_arc700.c index f415d851b765..5a1259cd948c 100644 --- a/arch/arc/mm/cache_arc700.c +++ b/arch/arc/mm/cache_arc700.c @@ -622,12 +622,12 @@ void flush_icache_range(unsigned long kstart, unsigned long kend) /* * General purpose helper to make I and D cache lines consistent. * @paddr is phy addr of region - * @vaddr is typically user or kernel vaddr (vmalloc) - * Howver in one instance, flush_icache_range() by kprobe (for a breakpt in + * @vaddr is typically user vaddr (breakpoint) or kernel vaddr (vmalloc) + * However in one instance, when called by kprobe (for a breakpt in * builtin kernel code) @vaddr will be paddr only, meaning CDU operation will * use a paddr to index the cache (despite VIPT). This is fine since since a - * built-in kernel page will not have any virtual mappings (not even kernel) - * kprobe on loadable module is different as it will have kvaddr. + * builtin kernel page will not have any virtual mappings. + * kprobe on loadable module will be kernel vaddr. */ void __sync_icache_dcache(unsigned long paddr, unsigned long vaddr, int len) { |