diff options
author | Tony Lindgren <tony@atomide.com> | 2013-08-26 03:18:43 -0700 |
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committer | Tony Lindgren <tony@atomide.com> | 2013-08-26 03:18:43 -0700 |
commit | eb8460e01ba632416277ea6d0f6324caa6963e4f (patch) | |
tree | c4dc890fb6ee8a8bd02e8bd23c96a53435a341af /arch/arm/mach-omap2/cclock44xx_data.c | |
parent | b36f4be3de1b123d8601de062e7dbfc904f305fb (diff) | |
parent | 4514b4d7fcad2a84066c73966c6a7823ea1b3749 (diff) |
Merge tag 'for-v3.12/omap-prcm-hwmod' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.12/prcm
Various OMAP PRCM & hwmod fixes and improvements. Notable changes
include:
- a fix for OMAP4 PLL locking to avoid a bootloader dependency that
causes nasty log spew on startup
- AM33xx DEBUGSS support fixes in hwmod data
- OMAP5 mailbox support in hwmod data
Basic test logs are here:
http://www.pwsan.com/omap/testlogs/prcm_a_for_v3.12/20130823125002/
Note that the 3530 failure is due to the mysterious transient serial
issue affecting 3530 for several releases now, which causes a log
parsing failure. PM still seems to work.
Diffstat (limited to 'arch/arm/mach-omap2/cclock44xx_data.c')
-rw-r--r-- | arch/arm/mach-omap2/cclock44xx_data.c | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/arch/arm/mach-omap2/cclock44xx_data.c b/arch/arm/mach-omap2/cclock44xx_data.c index 88e37a474334..1d5b5290d2af 100644 --- a/arch/arm/mach-omap2/cclock44xx_data.c +++ b/arch/arm/mach-omap2/cclock44xx_data.c @@ -1707,6 +1707,18 @@ int __init omap4xxx_clk_init(void) omap2_clk_disable_autoidle_all(); /* + * A set rate of ABE DPLL inturn triggers a set rate of USB DPLL + * when its in bypass. So always lock USB before ABE DPLL. + */ + /* + * Lock USB DPLL on OMAP4 devices so that the L3INIT power + * domain can transition to retention state when not in use. + */ + rc = clk_set_rate(&dpll_usb_ck, OMAP4_DPLL_USB_DEFFREQ); + if (rc) + pr_err("%s: failed to configure USB DPLL!\n", __func__); + + /* * On OMAP4460 the ABE DPLL fails to turn on if in idle low-power * state when turning the ABE clock domain. Workaround this by * locking the ABE DPLL on boot. @@ -1718,13 +1730,5 @@ int __init omap4xxx_clk_init(void) if (rc) pr_err("%s: failed to configure ABE DPLL!\n", __func__); - /* - * Lock USB DPLL on OMAP4 devices so that the L3INIT power - * domain can transition to retention state when not in use. - */ - rc = clk_set_rate(&dpll_usb_ck, OMAP4_DPLL_USB_DEFFREQ); - if (rc) - pr_err("%s: failed to configure USB DPLL!\n", __func__); - return 0; } |