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authorRafael J. Wysocki <rjw@sisk.pl>2011-09-26 20:12:45 +0200
committerRafael J. Wysocki <rjw@sisk.pl>2011-09-26 20:12:45 +0200
commit0d41da2e31e81f5c8aaabe17f769de4304b2d4c8 (patch)
tree540acefba9bf01d3880d7bacb767fbf9b1fe80b4 /arch/arm/mm/cache-l2x0.c
parenta0089bd617adea27ebc352e1e0871649ab1dbaa6 (diff)
parente8b364b88cc4001b21c28c1ecf1e1e3ffbe162e6 (diff)
Merge branch 'pm-fixes' into pm-domains
Merge commit e8b364b88cc4001b21c28c1ecf1e1e3ffbe162e6 (PM / Clocks: Do not acquire a mutex under a spinlock) fixing a regression in drivers/base/power/clock_ops.c. Conflicts: drivers/base/power/clock_ops.c
Diffstat (limited to 'arch/arm/mm/cache-l2x0.c')
-rw-r--r--arch/arm/mm/cache-l2x0.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 44c086710d2b..9ecfdb511951 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -277,6 +277,25 @@ static void l2x0_disable(void)
spin_unlock_irqrestore(&l2x0_lock, flags);
}
+static void __init l2x0_unlock(__u32 cache_id)
+{
+ int lockregs;
+ int i;
+
+ if (cache_id == L2X0_CACHE_ID_PART_L310)
+ lockregs = 8;
+ else
+ /* L210 and unknown types */
+ lockregs = 1;
+
+ for (i = 0; i < lockregs; i++) {
+ writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE +
+ i * L2X0_LOCKDOWN_STRIDE);
+ writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE +
+ i * L2X0_LOCKDOWN_STRIDE);
+ }
+}
+
void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
{
__u32 aux;
@@ -328,6 +347,8 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
* accessing the below registers will fault.
*/
if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & 1)) {
+ /* Make sure that I&D is not locked down when starting */
+ l2x0_unlock(cache_id);
/* l2x0 controller is disabled */
writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL);