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| author | James Morris <james.l.morris@oracle.com> | 2012-06-10 22:52:10 +1000 |
|---|---|---|
| committer | James Morris <james.l.morris@oracle.com> | 2012-06-10 22:52:10 +1000 |
| commit | 66dd07b88a1c9d446f32253da606b87324fa620e (patch) | |
| tree | 4e0971bdd543585c7ab46716ae808a7fd82f9c35 /arch/arm/mm/proc-v7-2level.S | |
| parent | f52c44cd27b4a0be37ef97f0466e4095ebebef3f (diff) | |
| parent | cfaf025112d3856637ff34a767ef785ef5cf2ca9 (diff) | |
Merge commit 'v3.5-rc2' into next
Diffstat (limited to 'arch/arm/mm/proc-v7-2level.S')
| -rw-r--r-- | arch/arm/mm/proc-v7-2level.S | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S index 3a4b3e7b888c..42ac069c8012 100644 --- a/arch/arm/mm/proc-v7-2level.S +++ b/arch/arm/mm/proc-v7-2level.S @@ -49,15 +49,10 @@ ENTRY(cpu_v7_switch_mm) #ifdef CONFIG_ARM_ERRATA_754322 dsb #endif - mcr p15, 0, r2, c13, c0, 1 @ set reserved context ID - isb -1: mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 - isb -#ifdef CONFIG_ARM_ERRATA_754322 - dsb -#endif mcr p15, 0, r1, c13, c0, 1 @ set context ID isb + mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 + isb #endif mov pc, lr ENDPROC(cpu_v7_switch_mm) |