diff options
| author | James Morris <jmorris@namei.org> | 2011-11-16 12:39:48 +1100 |
|---|---|---|
| committer | James Morris <jmorris@namei.org> | 2011-11-16 12:39:48 +1100 |
| commit | 24942c8e5cc8696064ee207ff29d4cf21f70dafc (patch) | |
| tree | 08a8221eb72ec3da7746d7d76f6f5915ce77cde7 /arch/arm/plat-samsung/pwm-clock.c | |
| parent | e163bc8e4a0cd1cdffadb58253f7651201722d56 (diff) | |
| parent | ff0ff78068dd8a962358dbbdafa9d6f24540d3e5 (diff) | |
Merge branch 'master'; commit 'v3.2-rc2' into next
Diffstat (limited to 'arch/arm/plat-samsung/pwm-clock.c')
| -rw-r--r-- | arch/arm/plat-samsung/pwm-clock.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/arch/arm/plat-samsung/pwm-clock.c b/arch/arm/plat-samsung/pwm-clock.c index f1bba88ed2f5..a35ff3bcffe4 100644 --- a/arch/arm/plat-samsung/pwm-clock.c +++ b/arch/arm/plat-samsung/pwm-clock.c @@ -27,7 +27,7 @@ #include <plat/cpu.h> #include <plat/regs-timer.h> -#include <mach/pwm-clock.h> +#include <plat/pwm-clock.h> /* Each of the timers 0 through 5 go through the following * clock tree, with the inputs depending on the timers. @@ -339,8 +339,17 @@ static int clk_pwm_tin_set_parent(struct clk *clk, struct clk *parent) unsigned long bits; unsigned long shift = S3C2410_TCFG1_SHIFT(id); + unsigned long mux_tclk; + + if (soc_is_s3c24xx()) + mux_tclk = S3C2410_TCFG1_MUX_TCLK; + else if (soc_is_s5p6440() || soc_is_s5p6450()) + mux_tclk = 0; + else + mux_tclk = S3C64XX_TCFG1_MUX_TCLK; + if (parent == s3c24xx_pwmclk_tclk(id)) - bits = S3C_TCFG1_MUX_TCLK << shift; + bits = mux_tclk << shift; else if (parent == s3c24xx_pwmclk_tdiv(id)) bits = clk_pwm_tdiv_bits(to_tdiv(parent)) << shift; else |