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authorIngo Molnar <mingo@elte.hu>2008-08-15 13:57:32 +0200
committerIngo Molnar <mingo@elte.hu>2008-08-15 13:57:32 +0200
commit975439fe73d1f0f7ce8c235c66783bd34dc459c3 (patch)
tree84e29852d96283b13c6e603f86bd506a631343c5 /arch/h8300/include/asm/cachectl.h
parentef31023743e66de7184e9aad432291c842a6384b (diff)
parent129d6aba444d1e99d4cbfb9866a4652912426b65 (diff)
Merge branch 'x86/amd-iommu' into x86/urgent
Diffstat (limited to 'arch/h8300/include/asm/cachectl.h')
-rw-r--r--arch/h8300/include/asm/cachectl.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/h8300/include/asm/cachectl.h b/arch/h8300/include/asm/cachectl.h
new file mode 100644
index 000000000000..c464022d8e26
--- /dev/null
+++ b/arch/h8300/include/asm/cachectl.h
@@ -0,0 +1,14 @@
+#ifndef _H8300_CACHECTL_H
+#define _H8300_CACHECTL_H
+
+/* Definitions for the cacheflush system call. */
+
+#define FLUSH_SCOPE_LINE 0 /* Flush a cache line */
+#define FLUSH_SCOPE_PAGE 0 /* Flush a page */
+#define FLUSH_SCOPE_ALL 0 /* Flush the whole cache -- superuser only */
+
+#define FLUSH_CACHE_DATA 0 /* Writeback and flush data cache */
+#define FLUSH_CACHE_INSN 0 /* Flush instruction cache */
+#define FLUSH_CACHE_BOTH 0 /* Flush both caches */
+
+#endif /* _H8300_CACHECTL_H */