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authorLinus Torvalds <torvalds@linux-foundation.org>2010-07-06 17:14:33 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2010-07-06 17:14:33 -0700
commit7491eb9b5f39dbd9faa32a07d76597ab502166a1 (patch)
tree972d05969c3989f553ce72860ef39c42265b1ed0 /arch/mips/ar7/platform.c
parent7263e715c91f3de554ab7d4f20f56e080783d0f5 (diff)
parent55dc9d51a89ba10a1f7b3ed15f1262eb83e87e74 (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (22 commits) MIPS: Return after handling coprocessor 2 exception MIPS: BCM47xx: Add NVRAM support devices MIPS: Loongson: Define rtc device on MC146818-equipped systems MIPS: MT: Fix FPU affinity. MIPS: Oprofile: Fixup of loongson2_exit() MIPS: Alchemy: sleepcode without compile-time cputype dependencies MIPS: Tracing: Cleanup of address space checking MIPS: Tracing: Cleanup of function graph tracer MIPS: Tracing: Reduce the overhead of dynamic Function Tracer MIPS: Tracing: Cleanup of instructions used MIPS: Tracing: Fix 32-bit support with -mmcount-ra-address MIPS: Tracing: Fix argument passing of the 32bit support with gcc 4.5 MIPS: Tracing: Cleanup comments MIPS: Tracing: Cleanup the arguments passing of prepare_ftrace_return MIPS: Tracing: Merge adjacent #ifdefs with same condition. MIPS: AR7, BCM63xx: fix gpio_to_irq() return value MIPS: Restore signalling NaN behaviour for abs.[sd] MIPS: Loongson: CS5536: Fix ISA support MIPS: Loongson: Add a missing break statement in CS5536 IDE code MIPS: Loongson: CS5536: Add missing RDMSRs for IDE and USB ...
Diffstat (limited to 'arch/mips/ar7/platform.c')
-rw-r--r--arch/mips/ar7/platform.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c
index 566f2d7f2ea3..8f31d1d59683 100644
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -542,7 +542,7 @@ static int __init ar7_register_uarts(void)
if (IS_ERR(bus_clk))
panic("unable to get bus clk\n");
- uart_port.type = PORT_16550A;
+ uart_port.type = PORT_AR7;
uart_port.uartclk = clk_get_rate(bus_clk) / 2;
uart_port.iotype = UPIO_MEM32;
uart_port.regshift = 2;