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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2011-01-23 17:22:16 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2011-01-24 18:27:32 +0000 |
| commit | 8a327f23e23fa509e6e3c2263ae1cc0a67dec387 (patch) | |
| tree | 119abf09e1ec9babaf78e6889187f9d54864b118 /arch/mips/kernel/traps.c | |
| parent | 5a9a8d1a99c617df82339456fbdd30d6ed3a856b (diff) | |
| parent | d315777b32a4696feb86f2a0c9e9f39c94683649 (diff) | |
Merge remote branch 'linus/master' into drm-intel-fixes
Merge with Linus to resolve conflicting fixes for the reusing the stale
HEAD value during intel_ring_wait().
Conflicts:
drivers/gpu/drm/i915/intel_ringbuffer.c
Diffstat (limited to 'arch/mips/kernel/traps.c')
| -rw-r--r-- | arch/mips/kernel/traps.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index e97104302541..71350f7f2d88 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1592,7 +1592,6 @@ void __cpuinit per_cpu_trap_init(void) #endif /* CONFIG_MIPS_MT_SMTC */ cpu_data[cpu].asid_cache = ASID_FIRST_VERSION; - TLBMISS_HANDLER_SETUP(); atomic_inc(&init_mm.mm_count); current->active_mm = &init_mm; @@ -1614,6 +1613,7 @@ void __cpuinit per_cpu_trap_init(void) write_c0_wired(0); } #endif /* CONFIG_MIPS_MT_SMTC */ + TLBMISS_HANDLER_SETUP(); } /* Install CPU exception handler */ |