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author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-02-27 16:19:22 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-02-27 16:19:22 -0800 |
commit | f1dd6ad599732fc89f36fdd65a2c2cf3c63a8711 (patch) | |
tree | 5092207128e47cba99dc0fe373fff6a36f4cb4b8 /arch/mips/oprofile/op_model_loongson2.c | |
parent | 8d37a371b6869920e6c40c495c68eabba1ef3909 (diff) | |
parent | e10b234b3c4e255d3300a486c4ac15b43253ac6d (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (141 commits)
MIPS: Alchemy: defconfig updates
MIPS: Alchemy: Fix Au1100 ethernet build failure
MIPS: Alchemy: Repair db1500/bosporus builds
MIPS: ARC: Cleanup unused definitions from sgialib.h
MIPS: Cobalt: convert legacy port addresses to GT-64111 bus addresses
MIPS: Alchemy: use 36bit addresses for PCMCIA resources.
MIPS: Cobalt: Fix theoretical port aliasing issue
MIPS: Use ALIGN(x, bytes) instead of __ALIGN_MASK(x, bytes - 1)
MIPS: Crazy spinlock speed test.
MIPS: Optimize spinlocks.
MIPS: Alchemy: devboard PM needs to save CPLD registers.
MIPS: PowerTV: Eliminate duplicate opcode definition macros
MIPS: Lemote 2F: Move printks out of port_access_lock.
MIPS: PNX833x: Convert IRQ controller locks to raw spinlocks.
MIPS: Octeon: Replace spinlock with raw_spinlocks in dma-octeon.c.
MIPS: Octeon: Replace rwlocks in irq_chip handlers with raw_spinlocks.
MIPS: Octeon: Convert octeon_irq_msi_lock to raw spinlock.
MIPS: Loongson: Remove pointless sample_lock from oprofile code.
MIPS: SNI: Convert sni_rm200_i8259A_lock to raw spinlock.
MIPS: i8259: Convert IRQ controller lock to raw spinlock.
...
Diffstat (limited to 'arch/mips/oprofile/op_model_loongson2.c')
-rw-r--r-- | arch/mips/oprofile/op_model_loongson2.c | 9 |
1 files changed, 1 insertions, 8 deletions
diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c index 475ff46712ab..29e2326b6257 100644 --- a/arch/mips/oprofile/op_model_loongson2.c +++ b/arch/mips/oprofile/op_model_loongson2.c @@ -3,7 +3,7 @@ * * Copyright (C) 2009 Lemote Inc. * Author: Yanhua <yanh@lemote.com> - * Author: Wu Zhangjin <wuzj@lemote.com> + * Author: Wu Zhangjin <wuzhangjin@gmail.com> * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -47,8 +47,6 @@ static struct loongson2_register_config { int cnt1_enabled, cnt2_enabled; } reg; -DEFINE_SPINLOCK(sample_lock); - static char *oprofid = "LoongsonPerf"; static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id); /* Compute all of the registers in preparation for enabling profiling. */ @@ -115,7 +113,6 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id) uint64_t counter, counter1, counter2; struct pt_regs *regs = get_irq_regs(); int enabled; - unsigned long flags; /* * LOONGSON2 defines two 32-bit performance counters. @@ -136,8 +133,6 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id) counter1 = counter & 0xffffffff; counter2 = counter >> 32; - spin_lock_irqsave(&sample_lock, flags); - if (counter1 & LOONGSON2_PERFCNT_OVERFLOW) { if (reg.cnt1_enabled) oprofile_add_sample(regs, 0); @@ -149,8 +144,6 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id) counter2 = reg.reset_counter2; } - spin_unlock_irqrestore(&sample_lock, flags); - write_c0_perfcnt((counter2 << 32) | counter1); return IRQ_HANDLED; |