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authorLinus Torvalds <torvalds@linux-foundation.org>2009-04-07 07:40:55 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2009-04-07 07:40:55 -0700
commit44d84afa834b799560d7dbe47250ad7557f5ca2f (patch)
treed18b90078503c956d32f9f0c6524bc43ece96b25 /arch/powerpc/include/asm/mpic.h
parentf8201abcb2badce7eaa6a3715f9a228cfd88a453 (diff)
parent11b55da700eb77905f1c2dde3a0cbeedc665a753 (diff)
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (28 commits) powerpc: Fix oops when loading modules powerpc: Wire up preadv and pwritev powerpc/ftrace: Fix printf format warning powerpc/ftrace: Fix #if that should be #ifdef powerpc: Fix ptrace compat wrapper for FPU register access powerpc: Print information about mapping hw irqs to virtual irqs powerpc: Correct dependency of KEXEC powerpc: Disable VSX or current process in giveup_fpu/altivec powerpc/pseries: Enable relay in pseries_defconfig powerpc/pseries: Fix ibm,client-architecture comment powerpc/pseries: Scan for all events in rtasd powerpc/pseries: Add dispatch dispersion statistics powerpc: Clean up some prom printouts powerpc: Print progress of ibm,client-architecture method powerpc: Remove duplicated #include's powerpc/pmac: Fix internal modem IRQ on Wallstreet PowerBook powerpc/wdrtas: Update wdrtas_get_interval to use rtas_data_buf fsl-diu-fb: Pass the proper device for dma mapping routines powerpc/pq2fads: Update device tree for use with device-tree-aware u-boot. cpm_uart: Disable CPM udbg when re-initing CPM uart, even if not the console. ...
Diffstat (limited to 'arch/powerpc/include/asm/mpic.h')
-rw-r--r--arch/powerpc/include/asm/mpic.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index c2ccca53b991..a002682f3a6d 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -22,6 +22,14 @@
#define MPIC_GREG_FEATURE_1 0x00010
#define MPIC_GREG_GLOBAL_CONF_0 0x00020
#define MPIC_GREG_GCONF_RESET 0x80000000
+/* On the FSL mpic implementations the Mode field is expand to be
+ * 2 bits wide:
+ * 0b00 = pass through (interrupts routed to IRQ0)
+ * 0b01 = Mixed mode
+ * 0b10 = reserved
+ * 0b11 = External proxy / coreint
+ */
+#define MPIC_GREG_GCONF_COREINT 0x60000000
#define MPIC_GREG_GCONF_8259_PTHROU_DIS 0x20000000
#define MPIC_GREG_GCONF_NO_BIAS 0x10000000
#define MPIC_GREG_GCONF_BASE_MASK 0x000fffff
@@ -357,6 +365,8 @@ struct mpic
#define MPIC_BROKEN_FRR_NIRQS 0x00000800
/* Destination only supports a single CPU at a time */
#define MPIC_SINGLE_DEST_CPU 0x00001000
+/* Enable CoreInt delivery of interrupts */
+#define MPIC_ENABLE_COREINT 0x00002000
/* MPIC HW modification ID */
#define MPIC_REGSET_MASK 0xf0000000
@@ -470,6 +480,8 @@ extern void mpic_end_irq(unsigned int irq);
extern unsigned int mpic_get_one_irq(struct mpic *mpic);
/* This one gets from the primary mpic */
extern unsigned int mpic_get_irq(void);
+/* This one gets from the primary mpic via CoreInt*/
+extern unsigned int mpic_get_coreint_irq(void);
/* Fetch Machine Check interrupt from primary mpic */
extern unsigned int mpic_get_mcirq(void);