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authorLinus Torvalds <torvalds@linux-foundation.org>2010-10-25 07:51:49 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2010-10-25 07:51:49 -0700
commit1dfd166e93f98892aa4427069a23ed73259983c8 (patch)
treec70a347b963091b99bd16842537153fa36e5c0e9 /arch/sh/drivers/pci/ops-sh4.c
parent8e775167d54e6521e7cdbc03ee7ec42a8c67b49a (diff)
parent8df399018df120d28f89fda6f2515cc6e096e43d (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (110 commits) sh: i2c-sh7760: Replase from ctrl_* to __raw_* sh: clkfwk: Shuffle around to match the intc split up. sh: clkfwk: modify for_each_frequency end condition sh: fix clk_get() error handling sh: clkfwk: Fix fault in frequency iterator. sh: clkfwk: Add a helper for rate rounding by divisor ranges. sh: clkfwk: Abstract rate rounding helper. sh: clkfwk: support clock remapping. sh: pci: Convert to upper/lower_32_bits() helpers. sh: mach-sdk7786: Add support for the FPGA SRAM. sh: Provide a generic SRAM pool for tiny memories. sh: pci: Support secondary FPGA-driven PCIe clocks on SDK7786. sh: pci: Support slot 4 routing on SDK7786. sh: Fix up PMB locking. sh: mach-sdk7786: Add support for fpga gpios. sh: use pr_fmt for clock framework, too. sh: remove name and id from struct clk sh: free-without-alloc fix for sh_mobile_lcdcfb sh: perf: Set up perf_max_events. sh: perf: Support SH-X3 hardware counters. ... Fix up trivial conflicts (perf_max_events got removed) in arch/sh/kernel/perf_event.c
Diffstat (limited to 'arch/sh/drivers/pci/ops-sh4.c')
-rw-r--r--arch/sh/drivers/pci/ops-sh4.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/arch/sh/drivers/pci/ops-sh4.c b/arch/sh/drivers/pci/ops-sh4.c
index 0b81999fb88b..b6234203e0ac 100644
--- a/arch/sh/drivers/pci/ops-sh4.c
+++ b/arch/sh/drivers/pci/ops-sh4.c
@@ -9,6 +9,7 @@
*/
#include <linux/pci.h>
#include <linux/io.h>
+#include <linux/spinlock.h>
#include <asm/addrspace.h>
#include "pci-sh4.h"
@@ -18,8 +19,6 @@
#define CONFIG_CMD(bus, devfn, where) \
(0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
-static DEFINE_SPINLOCK(sh4_pci_lock);
-
/*
* Functions for accessing PCI configuration space with type 1 accesses
*/
@@ -34,10 +33,10 @@ static int sh4_pci_read(struct pci_bus *bus, unsigned int devfn,
* PCIPDR may only be accessed as 32 bit words,
* so we must do byte alignment by hand
*/
- spin_lock_irqsave(&sh4_pci_lock, flags);
+ raw_spin_lock_irqsave(&pci_config_lock, flags);
pci_write_reg(chan, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR);
data = pci_read_reg(chan, SH4_PCIPDR);
- spin_unlock_irqrestore(&sh4_pci_lock, flags);
+ raw_spin_unlock_irqrestore(&pci_config_lock, flags);
switch (size) {
case 1:
@@ -69,10 +68,10 @@ static int sh4_pci_write(struct pci_bus *bus, unsigned int devfn,
int shift;
u32 data;
- spin_lock_irqsave(&sh4_pci_lock, flags);
+ raw_spin_lock_irqsave(&pci_config_lock, flags);
pci_write_reg(chan, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR);
data = pci_read_reg(chan, SH4_PCIPDR);
- spin_unlock_irqrestore(&sh4_pci_lock, flags);
+ raw_spin_unlock_irqrestore(&pci_config_lock, flags);
switch (size) {
case 1: