diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-03-26 18:35:22 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-03-26 18:35:22 -0700 |
| commit | d55a4528f7f607ca2872fec18574bc8cec060f05 (patch) | |
| tree | d7fa9184df280c53efaf5a73d648a255ed142196 /arch/sparc64/kernel/irq.c | |
| parent | 08dcf29e01dcb786c13dc80045bd65f804117efb (diff) | |
| parent | c101b088ba0ed16d7109b2f3c2d16798d162a535 (diff) | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6:
[SPARC64]: Define TASK_SIZE_OF()
[SPARC64]: flush_ptrace_access() needs preemption disable.
[SPARC64]: Update defconfig.
[SPARC64]: Fix allnoconfig build, ptrace.c missing CONFIG_COMPAT checks.
[SPARC64]: Fix __get_cpu_var in preemption-enabled area.
[SPARC64]: Fix sparse warnings in arch/sparc64/kernel/signal.c
[SPARC64]: Fix most sparse warnings in arch/sparc64/kernel/sys_sparc.c
[SPARC64]: Fix sparse warnings in arch/sparc64/kernel/time.c
[SPARC64]: Fix sparse warnings in arch/sparc64/kernel/ptrace.c
[SPARC64]: Fix sparse warnings in arch/sparc64/kernel/irq.c
[SPARC64]: Fix sparse warnings in arch/sparc64/kernel/iommu.c
[SPARC64]: Fix sparse errors in arch/sparc64/kernel/traps.c
[SPARC64]: Fix sparse warnings in arch/sparc64/kernel/{cpu,setup}.c
[SPARC64]: Adjust {TLBTEMP,TSBMAP}_BASE.
[SPARC64]: Make save_stack_trace() more efficient.
Diffstat (limited to 'arch/sparc64/kernel/irq.c')
| -rw-r--r-- | arch/sparc64/kernel/irq.c | 21 |
1 files changed, 2 insertions, 19 deletions
diff --git a/arch/sparc64/kernel/irq.c b/arch/sparc64/kernel/irq.c index 5ec06c8c7fea..eb88bd6e674e 100644 --- a/arch/sparc64/kernel/irq.c +++ b/arch/sparc64/kernel/irq.c @@ -44,27 +44,10 @@ #include <asm/hypervisor.h> #include <asm/cacheflush.h> -/* UPA nodes send interrupt packet to UltraSparc with first data reg - * value low 5 (7 on Starfire) bits holding the IRQ identifier being - * delivered. We must translate this into a non-vector IRQ so we can - * set the softint on this cpu. - * - * To make processing these packets efficient and race free we use - * an array of irq buckets below. The interrupt vector handler in - * entry.S feeds incoming packets into per-cpu pil-indexed lists. - * - * If you make changes to ino_bucket, please update hand coded assembler - * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S - */ -struct ino_bucket { -/*0x00*/unsigned long __irq_chain_pa; - - /* Virtual interrupt number assigned to this INO. */ -/*0x08*/unsigned int __virt_irq; -/*0x0c*/unsigned int __pad; -}; +#include "entry.h" #define NUM_IVECS (IMAP_INR + 1) + struct ino_bucket *ivector_table; unsigned long ivector_table_pa; |