diff options
| author | Grant Likely <grant.likely@secretlab.ca> | 2010-12-22 00:10:01 -0700 |
|---|---|---|
| committer | Grant Likely <grant.likely@secretlab.ca> | 2010-12-22 00:10:01 -0700 |
| commit | 752a4a95e3c96a8e8d3405b16d292f13e8c7856b (patch) | |
| tree | 838e43696fdc45b83f082eef7230d79cfe699497 /arch/tile/include/asm/processor.h | |
| parent | bc3f67a3e1b20756d4bfa5886a6b8fd0c068e6a4 (diff) | |
| parent | 90a8a73c06cc32b609a880d48449d7083327e11a (diff) | |
Merge commit 'v2.6.37-rc7' into spi/next
Diffstat (limited to 'arch/tile/include/asm/processor.h')
| -rw-r--r-- | arch/tile/include/asm/processor.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/tile/include/asm/processor.h b/arch/tile/include/asm/processor.h index 1747ff3946b2..a9e7c8760334 100644 --- a/arch/tile/include/asm/processor.h +++ b/arch/tile/include/asm/processor.h @@ -292,8 +292,18 @@ extern int kstack_hash; /* Are we using huge pages in the TLB for kernel data? */ extern int kdata_huge; +/* Support standard Linux prefetching. */ +#define ARCH_HAS_PREFETCH +#define prefetch(x) __builtin_prefetch(x) #define PREFETCH_STRIDE CHIP_L2_LINE_SIZE() +/* Bring a value into the L1D, faulting the TLB if necessary. */ +#ifdef __tilegx__ +#define prefetch_L1(x) __insn_prefetch_l1_fault((void *)(x)) +#else +#define prefetch_L1(x) __insn_prefetch_L1((void *)(x)) +#endif + #else /* __ASSEMBLY__ */ /* Do some slow action (e.g. read a slow SPR). */ |