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| author | David S. Miller <davem@davemloft.net> | 2016-02-01 18:44:07 -0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2016-02-01 18:44:07 -0800 |
| commit | b45efa30a626e915192a6c548cd8642379cd47cc (patch) | |
| tree | 90d8b43ebceb850b0e7852d75283aebbd2abbc00 /arch/x86/include/asm/pci_x86.h | |
| parent | 7a26019fdecdb45ff784ae4e3b7e0cc9045100ca (diff) | |
| parent | 34229b277480f46c1e9a19f027f30b074512e68b (diff) | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Diffstat (limited to 'arch/x86/include/asm/pci_x86.h')
| -rw-r--r-- | arch/x86/include/asm/pci_x86.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h index fa1195dae425..46873fbd44e1 100644 --- a/arch/x86/include/asm/pci_x86.h +++ b/arch/x86/include/asm/pci_x86.h @@ -151,11 +151,11 @@ extern struct list_head pci_mmcfg_list; #define PCI_MMCFG_BUS_OFFSET(bus) ((bus) << 20) /* - * AMD Fam10h CPUs are buggy, and cannot access MMIO config space - * on their northbrige except through the * %eax register. As such, you MUST - * NOT use normal IOMEM accesses, you need to only use the magic mmio-config - * accessor functions. - * In fact just use pci_config_*, nothing else please. + * On AMD Fam10h CPUs, all PCI MMIO configuration space accesses must use + * %eax. No other source or target registers may be used. The following + * mmio_config_* accessors enforce this. See "BIOS and Kernel Developer's + * Guide (BKDG) For AMD Family 10h Processors", rev. 3.48, sec 2.11.1, + * "MMIO Configuration Coding Requirements". */ static inline unsigned char mmio_config_readb(void __iomem *pos) { |