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authorIngo Molnar <mingo@elte.hu>2008-07-24 08:09:26 +0200
committerIngo Molnar <mingo@elte.hu>2008-07-24 08:09:26 +0200
commit28afe961a18f77b2249062499bdbf70fd2ec6bba (patch)
tree71a5cb32924b8c8256bbc0f2f81c6b8c2ac79108 /arch/x86/kernel/cpu/intel.c
parent1e01cb0c6ff7e9ddb6547551794c6aa82785a7cb (diff)
parent338b9bb3adac0d2c5a1e180491d9b001d624c402 (diff)
Merge branch 'linus' into tracing/urgent
Diffstat (limited to 'arch/x86/kernel/cpu/intel.c')
-rw-r--r--arch/x86/kernel/cpu/intel.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 70609efdf1da..b75f2569b8f8 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -227,6 +227,16 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
if (cpu_has_bts)
ds_init_intel(c);
+ /*
+ * See if we have a good local APIC by checking for buggy Pentia,
+ * i.e. all B steppings and the C2 stepping of P54C when using their
+ * integrated APIC (see 11AP erratum in "Pentium Processor
+ * Specification Update").
+ */
+ if (cpu_has_apic && (c->x86<<8 | c->x86_model<<4) == 0x520 &&
+ (c->x86_mask < 0x6 || c->x86_mask == 0xb))
+ set_cpu_cap(c, X86_FEATURE_11AP);
+
#ifdef CONFIG_X86_NUMAQ
numaq_tsc_disable();
#endif