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| author | Dave Airlie <airlied@redhat.com> | 2016-05-12 11:16:55 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2016-05-12 11:16:55 +1000 |
| commit | 7d020672615d09cf6ec42c500f34d70adf6758a9 (patch) | |
| tree | 9802fd588de854c788a59449233ea42acd107cc0 /drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | |
| parent | 95306975e9dd38ba2775dd96cb29987ecc7d9360 (diff) | |
| parent | b4eeed590deeff13a53db641129f0301d70248f3 (diff) | |
Merge branch 'drm-next-4.7' of git://people.freedesktop.org/~agd5f/linux into drm-next
More amdgpu fixes for 4.7. Highlights:
- enable async pageflips
- UVD fixes for polaris
- lots of GPUVM fixes
- whitespace and code cleanups
- misc bug fixes
* 'drm-next-4.7' of git://people.freedesktop.org/~agd5f/linux: (32 commits)
drm/amd/powerplay: rewrite pp_sw_init to make code readable
drm/amdgpu/dce11: fix audio offset for asics with >7 audio pins
drm/amdgpu: fix and cleanup user fence handling v2
drm/amdgpu: move VM fields into job
drm/amdgpu: move the context from the IBs into the job
drm/amdgpu: move context switch handling into common code v2
drm/amdgpu: move preamble IB handling into common code
drm/amdgpu/gfx7: fix pipeline sync
amdgpu/uvd: separate context buffer from DPB
drm/amdgpu: use fence_context to judge ctx switch v2
drm/amd/amdgpu: Added more named DRM info messages for debugging
drm/amd/amdgpu: Add name field to amd_ip_funcs (v2)
drm/amdgpu: Support DRM_MODE_PAGE_FLIP_ASYNC (v2)
drm/amdgpu/dce11: don't share PLLs on Polaris
drm/amdgpu: Drop unused parameter for *get_sleep_divider_id_from_clock
drm/amdgpu: Simplify calculation in *get_sleep_divider_id_from_clock
drm/amdgpu: Use max macro in *get_sleep_divider_id_from_clock
drm/amd/powerplay: Use defined constants for minium engine clock
drm/amdgpu: add missing licenses on a couple of files
drm/amdgpu: fetch cu_info once at init
...
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c index 00b43700c956..063f08a9957a 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c @@ -400,9 +400,10 @@ static void sdma_v3_0_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) * Schedule an IB in the DMA ring (VI). */ static void sdma_v3_0_ring_emit_ib(struct amdgpu_ring *ring, - struct amdgpu_ib *ib) + struct amdgpu_ib *ib, + unsigned vm_id, bool ctx_switch) { - u32 vmid = ib->vm_id & 0xf; + u32 vmid = vm_id & 0xf; u32 next_rptr = ring->wptr + 5; while ((next_rptr & 7) != 2) @@ -925,7 +926,7 @@ static int sdma_v3_0_ring_test_ib(struct amdgpu_ring *ring) ib.ptr[7] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); ib.length_dw = 8; - r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f); + r = amdgpu_ib_schedule(ring, 1, &ib, NULL, NULL, &f); if (r) goto err1; @@ -1542,6 +1543,7 @@ static int sdma_v3_0_set_powergating_state(void *handle, } const struct amd_ip_funcs sdma_v3_0_ip_funcs = { + .name = "sdma_v3_0", .early_init = sdma_v3_0_early_init, .late_init = NULL, .sw_init = sdma_v3_0_sw_init, |