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authorDave Airlie <airlied@redhat.com>2017-02-17 11:55:12 +1000
committerDave Airlie <airlied@redhat.com>2017-02-17 11:55:12 +1000
commitdec13c8ba2f5be8839ba5505b57b22ab0d2a287e (patch)
tree4a5b0c2ed1c2cd0f653ffa6185cc98a0b3f80750 /drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
parentbe3c9f5eed3be89d17b5dcffc38412932214fbae (diff)
parente8411302b44b844b4f619e8064735c70b7490ee8 (diff)
Merge branch 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux into drm-next
Fixes for 4.11. Highlights: - fix >2 displays on asics with 3 or 5 crtcs - fix SI headless asics - powerplay fixes for new polaris variants - misc fixes * 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux: drm/amdgpu: fix warning on older gcc releases drm/ttm: make TTM_MAX_BO_PRIORITY unsigned drm/amd/amdgpu: Fix flow control in uvd_v4_2_stop() drm/amd/powerplay: add didt config table for polaris kicker drm/amd/powerplay: modify VddcPhase value for polaris kicker drm/amd/powerplay: add kicker flag into smumgr drm/amdgpu: Initialize pipe priority order on graphic initialization drm/amdgpu: read hw register to check pg status. drm/amdgpu: Add to initialization of mmVCE_VCPU_CNTL register drm/amdgpu/pm: check for headless before calling compute_clocks drm/amdgpu: use amdgpu_gem_va_check() in amdgpu_gem_va_update_vm() drm/amdgpu: add more cases to DCE11 possible crtc mask setup
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index af83ab8c1250..18a6de4e1512 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
@@ -1051,12 +1051,10 @@ static int uvd_v6_0_set_powergating_state(void *handle,
if (state == AMD_PG_STATE_GATE) {
uvd_v6_0_stop(adev);
- adev->uvd.is_powergated = true;
} else {
ret = uvd_v6_0_start(adev);
if (ret)
goto out;
- adev->uvd.is_powergated = false;
}
out:
@@ -1070,7 +1068,8 @@ static void uvd_v6_0_get_clockgating_state(void *handle, u32 *flags)
mutex_lock(&adev->pm.mutex);
- if (adev->uvd.is_powergated) {
+ if (RREG32_SMC(ixCURRENT_PG_STATUS) &
+ CURRENT_PG_STATUS__UVD_PG_STATUS_MASK) {
DRM_INFO("Cannot get clockgating state when UVD is powergated.\n");
goto out;
}