diff options
| author | Dave Airlie <airlied@redhat.com> | 2016-09-28 11:27:05 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2016-09-28 11:27:05 +1000 |
| commit | 9f4ef05bcdcfdf911b056b471dd3c6a4f331b644 (patch) | |
| tree | ba8dfba87b4fe5295598f5438881822b6d3395f0 /drivers/gpu/drm/amd/amdgpu/vid.h | |
| parent | 81c5d6aa3983662b6b48b504fe3a0a4c640f6a84 (diff) | |
| parent | beb86f29c9c7f2d04f9a42c4c61cc469c3689779 (diff) | |
Merge branch 'drm-next-4.9' of git://people.freedesktop.org/~agd5f/linux into drm-next
Last set of radeon and amdgpu changes for 4.9. This is
mostly just the powerplay cleanup for dGPUs. Beyond that,
just misc code cleanups and bug fixes.
* 'drm-next-4.9' of git://people.freedesktop.org/~agd5f/linux: (49 commits)
drm/amd/amdgpu: Clean up afmt allocation in DCEv6. (v2)
drm/amd/amdgpu: Remove division from vblank_wait
drm/radeon/atif: Send a hotplug event when we get dgpu display request
drm/radeon/atpx: check for ATIF dGPU wake for display events support
drm/amdgpu/atif: Send a hotplug event when we get dgpu display request
drm/amdgpu/atpx: check for ATIF dGPU wake for display events support
drm/amdgpu: bump version for new vce packet support
drm/amdgpu/vce: allow the clock table packet
drm/amdgpu:cleanup virt related define
drm/amdgpu: use powerplay module for dgpu in Vi.
drm/amdgpu: set gfx clock gating for tonga/polaris.
drm/amdgpu: set system clock gating for tonga/polaris.
drm/amd/powerplay: export function to help to set cg by smu.
drm/amdgpu: avoid out of bounds access on array interrupt_status_offsets
drm/amdgpu: mark symbols static where possible
drm/amdgpu: remove unused functions
drm/amd/powerplay: Replace per-asic print_performance with generic
drm/radeon: narrow asic_init for virtualization
drm/amdgpu:add fw version entry to info
drm/amdgpu:determine if vPost is needed indeed
...
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/vid.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/vid.h | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/vid.h b/drivers/gpu/drm/amd/amdgpu/vid.h index f62b261660d4..11746f22d0c5 100644 --- a/drivers/gpu/drm/amd/amdgpu/vid.h +++ b/drivers/gpu/drm/amd/amdgpu/vid.h @@ -373,4 +373,41 @@ #define VCE_CMD_WAIT_GE 0x00000106 #define VCE_CMD_UPDATE_PTB 0x00000107 #define VCE_CMD_FLUSH_TLB 0x00000108 + +/* mmPA_SC_RASTER_CONFIG mask */ +#define RB_MAP_PKR0(x) ((x) << 0) +#define RB_MAP_PKR0_MASK (0x3 << 0) +#define RB_MAP_PKR1(x) ((x) << 2) +#define RB_MAP_PKR1_MASK (0x3 << 2) +#define RB_XSEL2(x) ((x) << 4) +#define RB_XSEL2_MASK (0x3 << 4) +#define RB_XSEL (1 << 6) +#define RB_YSEL (1 << 7) +#define PKR_MAP(x) ((x) << 8) +#define PKR_MAP_MASK (0x3 << 8) +#define PKR_XSEL(x) ((x) << 10) +#define PKR_XSEL_MASK (0x3 << 10) +#define PKR_YSEL(x) ((x) << 12) +#define PKR_YSEL_MASK (0x3 << 12) +#define SC_MAP(x) ((x) << 16) +#define SC_MAP_MASK (0x3 << 16) +#define SC_XSEL(x) ((x) << 18) +#define SC_XSEL_MASK (0x3 << 18) +#define SC_YSEL(x) ((x) << 20) +#define SC_YSEL_MASK (0x3 << 20) +#define SE_MAP(x) ((x) << 24) +#define SE_MAP_MASK (0x3 << 24) +#define SE_XSEL(x) ((x) << 26) +#define SE_XSEL_MASK (0x3 << 26) +#define SE_YSEL(x) ((x) << 28) +#define SE_YSEL_MASK (0x3 << 28) + +/* mmPA_SC_RASTER_CONFIG_1 mask */ +#define SE_PAIR_MAP(x) ((x) << 0) +#define SE_PAIR_MAP_MASK (0x3 << 0) +#define SE_PAIR_XSEL(x) ((x) << 2) +#define SE_PAIR_XSEL_MASK (0x3 << 2) +#define SE_PAIR_YSEL(x) ((x) << 4) +#define SE_PAIR_YSEL_MASK (0x3 << 4) + #endif |