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author | David S. Miller <davem@davemloft.net> | 2015-07-25 00:14:46 -0700 |
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committer | David S. Miller <davem@davemloft.net> | 2015-07-25 00:14:46 -0700 |
commit | a69e5a0dcfa4ea3e92b3cc0f17a39f1d88045c11 (patch) | |
tree | 66c60ddb3f667dbb5a2b896ca3140b931902883a /drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c | |
parent | 6ca91c604074788dfeb7dd714e74f0ad6bea8a77 (diff) | |
parent | 41a1d04b9d2006fdac5cab7680cff89915610944 (diff) |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue
Jeff Kirsher says:
====================
Intel Wired LAN Driver Updates 2015-07-23
This series contains updates to e1000e, igb, ixgbevf, i40e and i40evf.
Emil extends the reporting of the RSS key and hash table by adding support
for x550 VFs.
Jia-Ju Bai fixes a QoS issue in e1000e where the error handling lacked a
call to pm_qos_remove_request() to cleanup the QoS request made in
e1000_open().
Todd updates igb to report unsupported for ethtool coalesce settings
that are not supported. Also updated the driver to use the ARRAY_SIZE()
macro.
Carolyn fixes and refactors the dynamic ITR code for i40e and i40evf
which would never change dynamically. So update the switch() statement
to have a default case and switch on "new_latency_range" versus the
current ITR setting.
Shannon cleans up i40e code, where there were un-needed goto's. Also
clean up error status messages that were causing some confusion in
PHY and FCoE setup error reports.
Mitch updates the virtual channel interface to prepare for the x722 device
and other future devices, so that the VF driver can report what its
capable of supporting to the PF driver. Updates the i40evf driver to
handle resets like Core or EMP resets, where the device is reinitialized
and the VF will not get the same VSI.
Jesse updates the i40e and i40evf driver to use the kernel BIT() and
BIT_ULL() macros.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c')
-rw-r--r-- | drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c b/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c index d399eaf5aad5..fa371a2a40c6 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c +++ b/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c @@ -129,7 +129,7 @@ i40e_status i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num, obj->cnt = txq_num; obj->base = 0; size_exp = rd32(hw, I40E_GLHMC_LANTXOBJSZ); - obj->size = (u64)1 << size_exp; + obj->size = BIT_ULL(size_exp); /* validate values requested by driver don't exceed HMC capacity */ if (txq_num > obj->max_cnt) { @@ -152,7 +152,7 @@ i40e_status i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num, hw->hmc.hmc_obj[I40E_HMC_LAN_TX].size); obj->base = i40e_align_l2obj_base(obj->base); size_exp = rd32(hw, I40E_GLHMC_LANRXOBJSZ); - obj->size = (u64)1 << size_exp; + obj->size = BIT_ULL(size_exp); /* validate values requested by driver don't exceed HMC capacity */ if (rxq_num > obj->max_cnt) { @@ -175,7 +175,7 @@ i40e_status i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num, hw->hmc.hmc_obj[I40E_HMC_LAN_RX].size); obj->base = i40e_align_l2obj_base(obj->base); size_exp = rd32(hw, I40E_GLHMC_FCOEDDPOBJSZ); - obj->size = (u64)1 << size_exp; + obj->size = BIT_ULL(size_exp); /* validate values requested by driver don't exceed HMC capacity */ if (fcoe_cntx_num > obj->max_cnt) { @@ -198,7 +198,7 @@ i40e_status i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num, hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].size); obj->base = i40e_align_l2obj_base(obj->base); size_exp = rd32(hw, I40E_GLHMC_FCOEFOBJSZ); - obj->size = (u64)1 << size_exp; + obj->size = BIT_ULL(size_exp); /* validate values requested by driver don't exceed HMC capacity */ if (fcoe_filt_num > obj->max_cnt) { @@ -763,7 +763,7 @@ static void i40e_write_byte(u8 *hmc_bits, /* prepare the bits and mask */ shift_width = ce_info->lsb % 8; - mask = ((u8)1 << ce_info->width) - 1; + mask = BIT(ce_info->width) - 1; src_byte = *from; src_byte &= mask; @@ -804,7 +804,7 @@ static void i40e_write_word(u8 *hmc_bits, /* prepare the bits and mask */ shift_width = ce_info->lsb % 8; - mask = ((u16)1 << ce_info->width) - 1; + mask = BIT(ce_info->width) - 1; /* don't swizzle the bits until after the mask because the mask bits * will be in a different bit position on big endian machines @@ -854,7 +854,7 @@ static void i40e_write_dword(u8 *hmc_bits, * to 5 bits so the shift will do nothing */ if (ce_info->width < 32) - mask = ((u32)1 << ce_info->width) - 1; + mask = BIT(ce_info->width) - 1; else mask = ~(u32)0; @@ -906,7 +906,7 @@ static void i40e_write_qword(u8 *hmc_bits, * to 6 bits so the shift will do nothing */ if (ce_info->width < 64) - mask = ((u64)1 << ce_info->width) - 1; + mask = BIT_ULL(ce_info->width) - 1; else mask = ~(u64)0; |