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authorDaniel Vetter <daniel.vetter@ffwll.ch>2016-10-25 10:06:04 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2016-10-25 10:06:04 +0200
commit0fc4f78f44e6c6148cee32456f0d0023ec1c1fd8 (patch)
tree71c906207227dd8753a0191db9304035ec3471a4 /include/linux/t10-pi.h
parent78010cd9736ec571796f4404524ed575b81238b9 (diff)
parent5481e27f6fd06b7cb902072e81d6b083db8155eb (diff)
Merge remote-tracking branch 'airlied/drm-next' into topic/drm-misc
Backmerge latest drm-next to have a baseline for the s/fence/dma_fence/ patch from Chris. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Diffstat (limited to 'include/linux/t10-pi.h')
-rw-r--r--include/linux/t10-pi.h20
1 files changed, 20 insertions, 0 deletions
diff --git a/include/linux/t10-pi.h b/include/linux/t10-pi.h
index dd8de82cf5b5..9fba9dd33544 100644
--- a/include/linux/t10-pi.h
+++ b/include/linux/t10-pi.h
@@ -5,6 +5,26 @@
#include <linux/blkdev.h>
/*
+ * A T10 PI-capable target device can be formatted with different
+ * protection schemes. Currently 0 through 3 are defined:
+ *
+ * Type 0 is regular (unprotected) I/O
+ *
+ * Type 1 defines the contents of the guard and reference tags
+ *
+ * Type 2 defines the contents of the guard and reference tags and
+ * uses 32-byte commands to seed the latter
+ *
+ * Type 3 defines the contents of the guard tag only
+ */
+enum t10_dif_type {
+ T10_PI_TYPE0_PROTECTION = 0x0,
+ T10_PI_TYPE1_PROTECTION = 0x1,
+ T10_PI_TYPE2_PROTECTION = 0x2,
+ T10_PI_TYPE3_PROTECTION = 0x3,
+};
+
+/*
* T10 Protection Information tuple.
*/
struct t10_pi_tuple {