diff options
author | Takashi Iwai <tiwai@suse.de> | 2014-11-17 22:16:03 +0100 |
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committer | Takashi Iwai <tiwai@suse.de> | 2014-11-17 22:16:03 +0100 |
commit | 39ae97ea4b773be81bae9eec08ed1e5c53606c1a (patch) | |
tree | 4d55635fb46a86b970c1491cc529eb2770bf3076 /tools/perf/perf-sys.h | |
parent | a358a0ef861dae6f8330fb034aaa43adae71ebc1 (diff) | |
parent | cf9a7f7823c67243da44da2ac47ca944a3108282 (diff) |
Merge tag 'asoc-v3.18-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Fixes for v3.18
As well as the usual driver fixes there's a few other things here:
One is a fix for a race in DPCM which is unfortuantely a rather large
diffstat, this is the result of growing usage of the mainline code and
hence more detailed testing so I'm relatively happy.
The other is a fix for non-DT machine driver matching following some of
the componentization work which is much more focused.
Both have had a while to cook in -next.
Diffstat (limited to 'tools/perf/perf-sys.h')
-rw-r--r-- | tools/perf/perf-sys.h | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/tools/perf/perf-sys.h b/tools/perf/perf-sys.h index 937e4324ad94..a3b13d7dc1d4 100644 --- a/tools/perf/perf-sys.h +++ b/tools/perf/perf-sys.h @@ -13,7 +13,7 @@ #define wmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory") #define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory") #define cpu_relax() asm volatile("rep; nop" ::: "memory"); -#define CPUINFO_PROC "model name" +#define CPUINFO_PROC {"model name"} #ifndef __NR_perf_event_open # define __NR_perf_event_open 336 #endif @@ -30,7 +30,7 @@ #define wmb() asm volatile("sfence" ::: "memory") #define rmb() asm volatile("lfence" ::: "memory") #define cpu_relax() asm volatile("rep; nop" ::: "memory"); -#define CPUINFO_PROC "model name" +#define CPUINFO_PROC {"model name"} #ifndef __NR_perf_event_open # define __NR_perf_event_open 298 #endif @@ -47,14 +47,14 @@ #define mb() asm volatile ("sync" ::: "memory") #define wmb() asm volatile ("sync" ::: "memory") #define rmb() asm volatile ("sync" ::: "memory") -#define CPUINFO_PROC "cpu" +#define CPUINFO_PROC {"cpu"} #endif #ifdef __s390__ #define mb() asm volatile("bcr 15,0" ::: "memory") #define wmb() asm volatile("bcr 15,0" ::: "memory") #define rmb() asm volatile("bcr 15,0" ::: "memory") -#define CPUINFO_PROC "vendor_id" +#define CPUINFO_PROC {"vendor_id"} #endif #ifdef __sh__ @@ -67,14 +67,14 @@ # define wmb() asm volatile("" ::: "memory") # define rmb() asm volatile("" ::: "memory") #endif -#define CPUINFO_PROC "cpu type" +#define CPUINFO_PROC {"cpu type"} #endif #ifdef __hppa__ #define mb() asm volatile("" ::: "memory") #define wmb() asm volatile("" ::: "memory") #define rmb() asm volatile("" ::: "memory") -#define CPUINFO_PROC "cpu" +#define CPUINFO_PROC {"cpu"} #endif #ifdef __sparc__ @@ -87,14 +87,14 @@ #endif #define wmb() asm volatile("":::"memory") #define rmb() asm volatile("":::"memory") -#define CPUINFO_PROC "cpu" +#define CPUINFO_PROC {"cpu"} #endif #ifdef __alpha__ #define mb() asm volatile("mb" ::: "memory") #define wmb() asm volatile("wmb" ::: "memory") #define rmb() asm volatile("mb" ::: "memory") -#define CPUINFO_PROC "cpu model" +#define CPUINFO_PROC {"cpu model"} #endif #ifdef __ia64__ @@ -102,7 +102,7 @@ #define wmb() asm volatile ("mf" ::: "memory") #define rmb() asm volatile ("mf" ::: "memory") #define cpu_relax() asm volatile ("hint @pause" ::: "memory") -#define CPUINFO_PROC "model name" +#define CPUINFO_PROC {"model name"} #endif #ifdef __arm__ @@ -113,7 +113,7 @@ #define mb() ((void(*)(void))0xffff0fa0)() #define wmb() ((void(*)(void))0xffff0fa0)() #define rmb() ((void(*)(void))0xffff0fa0)() -#define CPUINFO_PROC "Processor" +#define CPUINFO_PROC {"model name", "Processor"} #endif #ifdef __aarch64__ @@ -133,28 +133,28 @@ : "memory") #define wmb() mb() #define rmb() mb() -#define CPUINFO_PROC "cpu model" +#define CPUINFO_PROC {"cpu model"} #endif #ifdef __arc__ #define mb() asm volatile("" ::: "memory") #define wmb() asm volatile("" ::: "memory") #define rmb() asm volatile("" ::: "memory") -#define CPUINFO_PROC "Processor" +#define CPUINFO_PROC {"Processor"} #endif #ifdef __metag__ #define mb() asm volatile("" ::: "memory") #define wmb() asm volatile("" ::: "memory") #define rmb() asm volatile("" ::: "memory") -#define CPUINFO_PROC "CPU" +#define CPUINFO_PROC {"CPU"} #endif #ifdef __xtensa__ #define mb() asm volatile("memw" ::: "memory") #define wmb() asm volatile("memw" ::: "memory") #define rmb() asm volatile("" ::: "memory") -#define CPUINFO_PROC "core ID" +#define CPUINFO_PROC {"core ID"} #endif #ifdef __tile__ @@ -162,7 +162,7 @@ #define wmb() asm volatile ("mf" ::: "memory") #define rmb() asm volatile ("mf" ::: "memory") #define cpu_relax() asm volatile ("mfspr zero, PASS" ::: "memory") -#define CPUINFO_PROC "model name" +#define CPUINFO_PROC {"model name"} #endif #define barrier() asm volatile ("" ::: "memory") |